amir hossein masnadi and shahriar mirabbasi ieee newcas, june 2012

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An Ultra-Low-Voltage CMOS Mixer Using Switched- Tr anscondu ctance Current-Reuse Dynamic-Threshold-Voltage Gain-Boosting Techniques. Amir Hossein Masnadi and Shahriar Mirabbasi IEEE NEWCAS, June 2012. Big Picture. - PowerPoint PPT Presentation

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An Ultra-Low-Voltage CMOS Mixer Using Switched-Transconductance, Current-Reuse and Dynamic-Threshold-Voltage Gain-Boosting Techniques

An Ultra-Low-Voltage CMOS Mixer Using Switched-TransconductanceCurrent-Reuse Dynamic-Threshold-Voltage Gain-Boosting Techniques Amir Hossein Masnadi and Shahriar MirabbasiIEEE NEWCAS, June 2012

Big Picture

Above Picture : Smart Stents, SoC and MEMS lab, UBCBiomedical ApplicationLow Power Wireless Communication

Designing Building Blocks for Ultra-LowVoltage/Power CMOS RF Front-End for applications such as:

2OutlineOverview of Conventional Active MixersOverview of techniquesStack Reduction, LO-Gm Separation Current-Reuse Dynamic Threshold Mixer Design Gm-Stage - Double Balanced Current Reuse Gilbert Structure LO -Stage - Switched Supply Voltage Post-Layout Simulation Results and Comparison Concluding remarks

33Conventional Active MixersGilbert-Type Mixer (Current commutating)

3 stacked transistors each transistor VDS is around VDD/3Considering Vth is around 0.4 V, minimum supply voltage is around 1.2 VTo increase conversion gain (CG) one can increase load (CGRL)Penalty: more voltage drop across load trade-off between VDD and CG

Mixer core is always ON (For Biasing the transistors)

Even more challenging if IIP3 has to be improved Limitations for Supply-Voltage:Power Consumption issue:

Challenge of biasing current source in saturation for low supply voltage (e.g. VDD < 1.5)Reduce the voltage drop across the Load Resistor to increase M1 drain Voltage4Supply Voltage (V) Year (1997-2012)Range of Threshold Voltage

y = -0.0853x + 172.44 Roughly Reduction of 0.085 V/YearBulk_Driven and Folded MethodsVery Low CG (1