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Institute of Computer and Communication Network Engineering Activity at IDA Mircea Negrean

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Activity at IDA. Mircea Negrean. Activity at IDA. Since July 2007 Research Project: IDA – Bosch ( Confidential ) Activity at IDA Research of multiprocessor scheduling, synchronization, … Extension of SymTA/S framework - PowerPoint PPT Presentation

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Page 1: Activity at IDA

Institute of Computer andCommunication Network Engineering

Activity at IDA

Mircea Negrean

Page 2: Activity at IDA

2Mircea Negrean - 01.04.2008

Activity at IDA

• Since July 2007– Research Project: IDA – Bosch (Confidential)– Activity at IDA

• Research of multiprocessor scheduling, synchronization, …• Extension of SymTA/S framework

– Static Priority Preemptive scheduler considers now the blocking time computed according to MPCP.

• Hiwi mentoring together with Simon Schliecker• Paper Reviews

Page 3: Activity at IDA

Institute of Computer andCommunication Network Engineering

MultiprocessorScheduling and Blocking Time

Analysis

Mircea Negrean

Simon Schliecker

Rolf Ernst

Page 4: Activity at IDA

4Mircea Negrean - 01.04.2008

Outline

• Moving to multicore ECUs• Multiprocessor scheduling and blocking time

analysis• Integration in SymTA/S - Demo

Page 5: Activity at IDA

5Mircea Negrean - 01.04.2008

Moving to multicore ECUs (1)• Virtualization

– Partitioned scheduling– Reuse of already known uniprocessor techniques,

code reuse, a.s.o.

CAN1-IF

ECU1

CPU1

CAN2-IF

ECU2

CPU2

CAN1-IF

ECU

CPU1

CAN2-IF

CPU2

Distributed multiprocessor architecture Multicore ECU architecture

Page 6: Activity at IDA

6Mircea Negrean - 01.04.2008

Moving to multicore ECUs (2)

• Problem– Sharing global resources leads to interference across

cores– Architectures must support real-time

• Requirements– Protocols which cover

• Tasks scheduling on each core• Resource arbitration

CAN1-IF

ECU

CPU1 CPU2

Multicore ECU Architecture

(with shared resources)

Page 7: Activity at IDA

7Mircea Negrean - 01.04.2008

Multiprocessor Priority Ceiling Protocol (MPCP)

• Extension of uniprocessor PCP [Rajkumar90]

• Assumptions and Definitions:– Static assignment of tasks to processors and local

scheduler on each core– Global priority space on the multiprocessor system– Local resources

• used only by tasks mapped on the same core

– Global resources • used by tasks mapped on different cores

– Priorities of global resources are higher than priorities of all tasks in the multiprocessor system

– Nesting of local and global resources is not allowed

Page 8: Activity at IDA

8Mircea Negrean - 01.04.2008

• Local blocking time (PCP)– Due to lower priority local tasks

• Blocking due to

– remote tasks – higher priority gcs's which can preempt lower priority gcs's on

remote cores– lower priority local tasks which may perform request to global

resources when the analyzed task becomes suspended

Types of blocking on multicore ECU

Global ResourcesLocal Resources

T1

T3

T2

T4

CPU1 CPU2

CAN-IF

R

L1 L2

Page 9: Activity at IDA

9Mircea Negrean - 01.04.2008

Tasks’ worst-case response time analysis

CPU2

SharedResources

t

CPU1T1

T3

T4

T2

CAN-IF

R

R

T1T2

CAN-IF

R

CAN-IF

T3

R

T4

)()()( 3)(33 3TBITWCETTWCRT Thp

WCRT(T3)

Page 10: Activity at IDA

10Mircea Negrean - 01.04.2008

Demo

Multiprocessor scheduling and blocking time analysis

in SymTA/S

Page 11: Activity at IDA

11Mircea Negrean - 01.04.2008

Multiprocessor analysis in SymTA/S (1)

CAN1-IF

ECU

CPU1

T3

T5

T7

CAN2-IF

CPU2

T2

T4

• No shared resources on the ECU

Page 12: Activity at IDA

12Mircea Negrean - 01.04.2008

Multiprocessor analysis in SymTA/S (2)

CAN1-IF

ECU

CPU1

T3

T5

T7

CPU2

T2

T4

• Cores share the CAN-Interface

System non-schedulable

Page 13: Activity at IDA

13Mircea Negrean - 01.04.2008

Multiprocessor analysis in SymTA/S (2)

CAN1-IF

ECU

CPU1

T3

T1

T7

CPU2

T2

T4

• Assign higher priority to T5 (T5 -> T1)

System is schedulable

Page 14: Activity at IDA

14Mircea Negrean - 01.04.2008

Thank you …