Ex/CSE/T/213/17/2010

BACHELOR OF COMP. SC. ENGG. EXAMINATION, 2010

(2nd Year, 1st Semester)

COMPUTER ORGANISATION

Time : Three hours Full Marks : 100

Answer any five questions.

Different parts of a question areto be answered together.

All Questions carry equal marks.

1. a) Design neatly the serial -parallel adder organisation to

add 8-signed numbers of 5-bits each. Consider the

delay with full adder be 100 n Sec and that for shift

register be 70 n Sec. What will be the total time

required to complete addition?

b) How associative memory differs from conventional

memory? Explain the organisation of associative

memory with a neat diagram.

Describe the match logic circuit used in associative

memory. 10+10

2. a) Design an ALU with three control lines CO, C

1 and C

2 and

one carry input line and two 8-bit binary inputs A and B[ TURN OVER ]

( 2 )

.

to perform the following operations (show the first three

stages only)

C2 C

1 C

o Operations

O O O A AND B

O O 1 A OR B

O 1 O A XOR B

O 1 1 Complement A

1 O O A - 1

1 O 1 A + 1

1 1 O A – B

1 1 1 A + B

b) Write program to evaluate the statement

using i) 3- address instruction

ii) 2-address instruction

iii) 1- address instruction

iv) 0-address instruction

3. a) Consider the following page reference sequence in a

virtual memory system.

1, 2, 3, 4 ,1, 5 , 2, 3, 6, 5 ,4 ,1 6, 2, 5, 4

Find the optimal proposal from the followings :

i) Change from FIFO to LRU

ii) Increase the main memory capacity from 4 to 8

i) Calculate the no. of bits in each of the TAG, SET and

WORD fields of the main memory address format.

ii) Assume that the cache is initially empty. Suppose that

the CPU fetches 4352 words from locations 0,1,2,...4351

in order. It then repeats this fetch sequence nine more

times.

If the cache is 10 times faster than the main memory,

estimate the improvement factor resulting from the use

of the cache (assume that LRU algorithm is used for

block replacement).

( 5 )

————×————

( )A B A

A B

+ ∗

∗A =

mantissa. The scale factor of the base is 4 and the

exponents are represented in excess-64 format.

Find the value of A + B where

A= 12.35 and B = 153

i) Represent A and B both in the above format and

also the result A + B

ii) Find A - B also in the above format, normalise and

rounded.

iii) What is the error introduced due to floating point

representation.

b) Consider the following reservation table :

i) Find the collision vector.

ii) Draw the state transition diagram.

iii) List all simple cycles and greedy cycles

iv) Determine the optimal constant latency cycle and the

minimal average latency. 10+10

7. A computer has 1 Mbyte main memory and 4K bytes of

cache organised in the block-set associative manner

with 4 pages per set and 64 bytes per page.

( 4 )

1 2 3 4 5 6S1

S2

S3

S4

S5

** *

**

** *

( 3 )

iii) Both or any thing else.

b) Write short notes on ( any two).i) Virtual memoryii) Carry Save addition

iii) Nano programmingiv) Rounding Techniques

4. A control unit has two inputs X, Y and eight states. The

control state diagram is as follows.

a) Design the control using eight D flipflops

b) Design the address sequencing part of microprogram.

5. a) Draw the combinational circuit for paper pencil method

of multiplication for two signed numbers -25 and + 18

Find also the total deley of multiplication.

b) Describe non-restoring type binary division algorithm

and the corresponding sequential circuit for

implementing it. Next verify step by step with the

example of 19 divided by 5. 10+10

6. a) Consider a 20-bit floating point number in a format

with 7-bit exponent and a 12-bit normalised fractional

[ TURN OVER ]

Ex/CSE/T/21C/15/2008

INTER COMPUTER SC. & ENGG. EXAMINATION, 2008

(1st Semester)

COMPUTER ORGANIZATION

Time : Three hours Full Marks : 100

Answer any five questions.

1. Consider the five stage pipelined processor specified by the

following reservation table :

a) List the set of for bidden latencies and the collision

vector.

b) Draw the state transition diagram.

c) List all the simple cycles from the state diagram.

[ TURN OVER ]

7. a) Consider a 20-bit floating-point number in a format with

7-bit exponent and 12-bit normalised fractional mantissa.

The base of the scale factor is 4 and the exponent is

represented in excess – 64 format.

Find the values of (A + B) and (A – B) where

A = 0 1 0 0 0 0 1 0 1 1 1 1 1 1 1 1 0 0 1 1

and B = 0 0 11111 0 1 0 1 0 1 0 1 0 1 0 11

which are expressed in above format. Give the answers

in normalised form. You are advised to use rounding

method for truncation.

b) Draw the combinational circuit for paper and pencil

method of multiplication for two 5-bit signed numbers.

10+10=20

—————×—————

( 6 )

1 2 3 4 5 6

S1

S2

S3

S4

S5

( 2 )

d) Identify the greedy cycles among the simple cycles.

e) What is minimum average latency ?

f) What is minimum allowed constant cycle in using this

pipeline.

g) What will be the maximum throughput of this pipeline ?

h) Is the MAL obtained in (e) is the lower bound ? If not

how do modify the reservation table to achieve lowest

MAL ? 20

2. a) Design a combinational circuit for a BCD adder showing

properly the carry-in and carry-out terminals.

b) Explain Booth’s Algorithm for multiplication of signed

binary numbers with the help of an example

A = 0 1 0 0 1 1 0

B = 1 0 1 1 0 1 1

Also explain bit pair speed-up technique applicable to

Booth’s algorithm. 10+10

3. a) Draw the CSA organisation to add 8 signed numbers of

5 bit each have CLA at the last stage.

Count the minimum no. of full adder and CLC required

for the circuit.

Calculate the minimum gate delay in the addition

process.

Design a hardwired controller using D flop flops and also

microprogram controller that will implement the above

algorithm. 10+10=20

6. a) Design an ALU with three control lines C0, C

1 and C

2

and one carry input line, two 8-bit binary input A and B

are to perform the following operations (Show the first

three stages and the last stage of ALU only):

C2 C1 C0 Operations

0 0 0 A + B

0 0 1 A – B

0 1 0 A + 1

0 1 1 A – 1

1 0 0 A AND B

1 0 1 A OR B

1 1 0 A XOR B

1 1 1 Complement A

b) Write program to evaluate the statement

X = ( A + B * C) / D * E – H

Using :

(i) 3-address instruction (ii) 2-address instruction

(iii) 1-address instruction (iv) 0-address instruction.

12+8=20

( 5 )

[ TURN OVER ]

Start : 17↓23↓

Inner 165 outerloop ↓ loop10 times 239 10 times

↓1200

↓1500

b) In a certain computer system with cache memory

750 µsec is the main memory access time for cache

miss and 50 µsec is the access time for a cache hit.

Find the percentage decrease in the effective access

time if the hit ratio is increased from 80% to 90%.

15+5=20

5. Consider the following algorithm :

Declare registers A(8), B(8), C(8) :

Start : B ← data

A ← 00

Loop : A ← A + B

B ← B – I

If B ≠ 0 then goto Loop.

C ← A

Halt : Goto Halt

( 4 ) ( 3 )

b) A table comprising 8 micro instructions is given below :

I0

C1

C2

C3

C4

C5

C6

I1 C1 C3 C4 C6

I2 C2 C5 C6

I3 C4 C5 C8

I4 C7 C8

I5

C1

C8

C9

I6 C3 C4 C8

I7

C1

C2

C9

(i) Propose an optimal hybrid micro instruction format

with minimal no. of bits.

(ii) Propose nanoprogram for the above. 10+10

4. a) Main memory size is 64 k bytes.

Cache memory size is 1 k byte

Block size is 64 bytes

Block-set-associative mapping with 4-blocks per set is

used.

(i) How many bits are there in each of TAG, SET and

OFFSET fields?

(ii) Find successfull hit ratio for the following program

structure where LRU replacement is used.

[ TURN OVER ]

Ex/CSE/T/213/14/09

BACHELOR OF COMPUTER.Sc. ENGG. EXAMINATION, 2009

(2nd Year, 1st Semester)

COMPUTER ORGANISATION

Time : Three hours Full Marks : 100

Answer any five questions

I. Consider the five stage pipelined processor specified by

the following reservation table :

a) List the set of forbidden latencies and the collision

vector.

b) Draw the state transition diagram

c) List all simple cycles from the state diagram

d) Identify the greedy cycles

e) What is MAL ?

[ TURN OVER ]

( 2 )

f) What is the minimum allowed constant cycle ?

g) What will be the maximum throughput of this

pipeline ?

h) Is the MAL obtained in (e) is the lower bound ? If

not how do modify the reservation table to achieve

lowest MAL ? 20

2. a) Design a device capable of adding three binary bits

simultaneously.

The device has five inputs and three outputs as shown

below :

X, Y and Z are three arguments, C1 is the carry–in from

the preceeding stage, C2, is the carry–in from prion to

proceeding stage. The output S designates the sum, Co1

is the carry–out for the succeeding stage and Co2 is the

carry–out for next - to the succeeding stage. Derive the

minimized boolean functions for each of the three

outputs S, Co1 and Co2. Also show the corresponding

truth table.

b) Draw the combinational circuit for paper and pencil

method of multiplication for two 5-bit signed numbers.

10+10

( 5 )

Following three organizations are proposed

i) Eight way interleaved

ii) Two groups of four way interleaved

iii) Four groups of two way interleaved

For each of the organization

a) Show address decoding scheme and address

assignment pattern.

b) Maximum unusable space when one module fails.

c) Comment on the relative merits of the three proposals.

7. a) Describe Booth’s bit pair algorithm for binary

multiplication and illustrate the algorithm with the example

of multiplication of –25 and +39.

b) Describe the nonrestoring type binary division algorithm

and the corresponding sequential circuit for

implementing it. Next verify your circuit with the example

of 18 divided by 5. 10+10

8. Write short notes on :- 5×4

i) Series parallel adder

ii) Virtual memory

iii) Nano programming

iv) Cache memory

—————×——————

( 4 )

Which of the page replacement policies FIFO, LRU and

LIFO is most suitable with cache memory capacity 4

paper ?

b) Design an ALU with three control lines Co, C1 and C2

and one carry input line and two 8-bit binary inputs A

and B to perform the following operations. (Show the

first three stages only)

C2 C1 Co Operations

0 0 0 A +B

0 0 1 A–B

0 1 0 A +1

0 1 1 A –1

1 0 0 A AND B

1 0 1 A OR B

1 1 0 A × OR B

1 1 1 Complement of A 8+12

6. a) What are the advantages of using normalized mantissa

and biased exponents in the floating point

representation of a binary number ? What are the IEEE

standards for floating point representations ?

Represent + 1.25 in single precision format.

b) 16 K byte of main memory in implemented using 8 nos

of 2 K byte module used in interleaved fashion.

( 3 )

3. Consider the following algorithm :

Declare registers A (8), B (8), C (8)

Start : B ← data

A← 00

Loop : A← A + B

B← B – 1

if B ≠ 0 then goto Loop

C← A

Halt : Goto Halt

Design a hard wired controller using D flip flops and also

microprogram controller that will implement the above

algorithm. 10+10

4. a) Draw the CSA organisation to add 8 signed numbers

of 4 bit each having ripple carry adder at the last stage.

Also count the number of full adders required and

calculate the gate delay in the addition process.

b) How associative memory differ from conventional

memory ? Explain the organisation of associative

memory with a neat diagram and describe the match

logic used in such memory. 10+10

5. a) The page reference pattern of a program is as follows :

1, 2, 3, 4, 1, 5, 2, 3, 6, 5, 4, 1, 6, 2, 5, 4

[ TURN OVER ]

EX\MTCT\208\179\07

M. TECH (COMP. TECH) EXAMINATION 2007(2nd Semester)

COMPUTER ORGANISATION

Time : Three hours Full Marks : 100

Answer any five questions.

1. Consider the five stage pipelined processor specified by thefollowing reservation table. 20

(a) List the set of forbidden latencies and the collision vector.

(b) Draw the state transition diagram.

(c) List all the simple cycles from the state diagram.

(d) Identify the greedy cycles among the simple cycles.

(e) What is minimum average latency?

(f) What is minimum allowed constant cycle in using thispipeline ?

(g) What will be the maximum throughput of this pipeline?

(h) Is the MAL obtained in (e) in the lower bound? If not try tomodify the reservation table to achieve the lower bound.

1 2 3 4 5 6

S1

S2

S3

S4

S5

X X

X X

X

X

X X

[ Turn Over ]

(b) Can you think of a situation where it would be advantageousto define a virtual memory that is smaller than availablephysical memory? 15+5

7. (a) For the following expression to evaluate on a stackorganised m/c write the m/c language program.

(b) The memory stack in a 16 bit computer contains 5A14H.The stack pointer contains 3A56H. A two word callsubroutine instruction is located at memory address 013EH

followed by the branch address of 67AEH at memoryaddress 013FH. What are the contents of PC, SP and thememory stack?(i) Before the CALL instruction is executed.(ii) After the CALL instruction is executed.(iii) After the RETURN from subroutine.(iv) After the second RETURN from subroutine just following

the previous one. 8+12

8. Write short notes on : 20

(i) Non-restoring division.

(ii) IEEE floating point representation.

(iii) DRAM, SDRAM and RDRAM.

(iv) Techniques of truncation used for floating point arithmetic.

———×———

( 4 )

A * B + A * B * D + (C * /(A * F ))

2. (a) Design a combinational circuit for a BCD adder showingproperly the carry-in and carry-out terminals. 10

(b) Explain Booth’s Algorithm for multiplication of signed binarynumbers with the help of an example.A = 0100110B = 1011011Also explain bit-pair speed-up technique applicable toBooth’s algorithm. 10

3. (a) A control unit has two inputs x and y and eight states. Thecontrol state diagram is as follows.

(i) Design the control using eight D flip-flops.(ii) Prescribe the address sequencing part for microprogram

control ROM. 8+8

(b) What is nanoprogramming, discuss briefly. 4

4. (a) Draw the CSA organisation to add 8 signed numbers of 4 biteach having ripple carry adder at the last stage. Also countthe number of full adders required and calculate the gatedelay in the addition process. 10

(b) (i) How associative memory differs from conventional memory?

(ii) Explain the organisation of associative memory with a neatdiagram.

(iii) Describe the match logic used in associative memory. 10

( 2 )

5. (a) Design an ALU with three control lines C0, C1 and C2 andone carry input line and two 4 bit binary inputs A and B toperform the following operations.

C2 C1 C0 Operations0 0 0 A+B0 0 1 A-B0 1 0 A+10 1 1 A-11 0 0 A AND B1 0 1 A OR B1 1 0 A XOR B1 1 1 Complement A

(b) In a certain computer system with cache memory 750 µsec is the memory access time for cache miss and 50

µ

sec is the memory access time for cache hit. Find thepercentage decrease in the effective access time if the hitratio is increased from 80% tom 90% 15+5

6. (a) A typical computer system has 32K main memory and 2Kfully associative cache memory. The cache block size is128 words. The access time for the main memory is 10times that of the cache memory.

(i) How many bits are there in the TAG field.(ii) Find the successful, hit ratio for the following program

structure where LRU replacement policy is used.

10 times

265

25 ←short

10 times800

2200

2500 ←End

( 3 )

[ Turn Over ]

EX\CP31D\9\06

B. C. S. E. PART-I EXAMINATION 2006 1st Semester

COMPUTER ORGANISATION

Time : Three hours Full Marks : 100

Answer any five questions.

1. a) What is the minimum set of registers required in the CPU of a small computer ? Explain their operations.

4+4

b) With the help of a logical block diagram explain how addition, subtraction, AND, OR, XOR and X NOR operation can be performed. 12

2. a) Explain the various hard wired methods of control signal generations. 12

b) Show how can the control signals for Fetch cycle be generated by using clocked delay elements ? 8

3. a) What are the various methods of micro-programming ? What are their relative merits and demerits ? 12

b) A processor has micro instruction format having four control fields. The number of control signals to be generated by each control fields are 4, 3, 11 and 8 respectively.

[ Turn Over ]

( 2 )

Compare the length of control bits of the micro- instruction register for various modes of micro- programming. 8

4. a) In a virtual memory system estimate the cost/bit, access time and access efficiency of the system. 8

b) A memory unit has a capacity for storing the memory is empty. The page request generated by a program is : 4 2 0 1 2 6 1 4 3 1 0 2 3 5 7.

Compare the performances of FIFO, LRV and LLV replacement policies. 12

5. a) What are the different address mapping techniques used in a cache ? What are their relative merits and demerits ? 12

b) The main memory of a computer system has 9 capacity of storing 16 M words of 32 bit data. The cache can store upto 64KB of data. The page length of cache is 16 word and the set size is 4.

Design the cache showing the sizes of the tag, index, block and word fields of cache address register. 8

6. a) What are the various types of interrupts ? Explain them. 3+6

b) What do you understand by priorities among the interrupts. 3

( 3 )

c) Explain the operation of a priority encoder and show how the control of the machine is transferred to the appropriate ISR. 4+4

7. With the help of the block and state diagrams of a DMA controller explain the following operations related to DMA :

Initialisation, Initiation, Operation and Termination. 4+4+12

8. Write notes on any four of the following : 4×5

a) Instruction formats and their comparison;

b) Addressing modes ;

c) Merits and demerits of Nano-programming ;

d) Micro program sequencer ;

e) Advantages and disadvantages of Paged segments ;

f) CAM’s

g) Program-controlled I/O’s ;

h) Types of IOP;s.

–––––––––x––––––––

[ Turn over

Ex/CSE/T/213/12/2007(S)

INTER ENGG. (COMPUTER SCIENCE ENGG.) EXAMINATION , 2007

1st Semester (Supplementary)

COMPUTER ORGANISATION

Time : Three hours Full Marks : 100

Answer any five questions.

Different parts of a question are to be answered together.

1. (a) In a virtual memory environment using FIFO for page

replacement, it is found that the successful hit ratio is

unacceptably low. Comment on each of the following

proposals made for increasing the hit ratio :

(i) Decrease the page size

(ii) Increase the main memory size

(iii) Replace FIFO by LRU

(iv) Go for multitasking.

(b) The page reference pattern of a program is as follows :

1, 2, 3, 4, 1, 5, 2, 3, 6, 5, 4, 1, 6, 2, 5, 4

which of the page replacement policies FIFO, LRU and

LIFO is most suitable with memory capacity 4 pages?

(c) In a two level virtual memory tA1

= 10–3 sec and

tA2

= 10–2 sec what must be the hit ratio H in order the

access efficiency to be within 80% of its maximum

possible value? 8+6+6

( 4 )

(b) The interface for a static memory costs Rs. 10/-

compared to Rs. 50/- for a dynamic memory and if static

memory costs Rs. 0.0002 per bit and dynamic memory

costs Rs. 0.0001 per bit, determine how many bits must

be in a memory module to make dynamic memory less

expensive.

(c) The memory stack in a 16-bit computer contains 5A14H.

The stock pointer contains 3A56H. A two word call

subroutine instruction is located at memory address 013EH.

followed by the branch address of 67AEH at memory

address 013FH. What are the contents of PC, SP and the

memory stack?

(i) Before the CALL instruction is executed.

(ii) After the CALL instruction is executed.

(iii) After the RETURN from subroutine

(iv) After the second RETURN from subroutine

following the one in part (iii). 5+5+10

7. (a) Describe Booth’s modified algorithm and show that just

N

2 partial products are required to multiply two N bit

binary numbers. Illustrate the algorithm with the example

of multiplication of +29 and –35.

(b) Draw the schematic diagram for daisy chain polling

arrangement in the case of non-vectored interrupt for

three devices. 10+10

––––––

( 3 )( 2 )

[ Turn over

2. (a) What is the difference between a subroutine and an

interrupt service routine ?

(b) Design an ALU with three control lines C0, C

1, and C

2

and one carry input line and two n-bit binary inputs A

and B to perform the following operations (show the first

two stages).

C2

C1

C0

Operations

0 0 0 A+B

0 0 1 A–B

0 1 0 A+1

0 1 1 A–1

1 0 0 A and B

1 0 1 A or B

1 1 0 A XOR B

1 1 1 Complement A

5+15

3. (a) Consider a 20-bit floating point number in a format with

7-bit exponent and a 12-bit normalised fractional

mantissa. The base of the scale factor in 4 and the

exponents is represented in excess-64 format

Find the values of (A+B) and (A–B) where

A = 0 1 0 0 0 0 1 0 1 1 1 1 1 1 1 1 0 0 1 1

B = 0 0 1 1 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1 1

which are represented in the above format and give the

answers in normalised form. Use rounding method for

truncation.

(b) Draw the CSA organisation to add 9 signed numbers of

4-bit each having ripple carry adder at the last stage.

Also calculate the number of gate delays in your addition

process. 10+10

4. A control unit has two inputs X and Y and eight-states. The

control state diagram is as follows :

T0 T1 T2

T3 T4

T5 T6

T7

y=0

x=0

x=1y=1

(a) Design the control using eight D flip flops.

(b) Design the address sequencing part of microprogram

control. 10+10

5. Write short note on any two of the following : 10×2

(a) Non-restoring algorithm for binary division.

(b) Direct memory access.

(c) Techniques of truncation used for floating point

arithmetic.

6. (a) What are the differences between asynchronous and

synchronous mode of data transfer.

[ Turn over

Ex/CSE/T/213/12/2007(S)

INTER ENGG. (COMPUTER SCIENCE ENGG.) EXAMINATION , 2007

1st Semester (Supplementary)

COMPUTER ORGANISATION

Time : Three hours Full Marks : 100

Answer any five questions.

Different parts of a question are to be answered together.

1. (a) In a virtual memory environment using FIFO for page

replacement, it is found that the successful hit ratio is

unacceptably low. Comment on each of the following

proposals made for increasing the hit ratio :

(i) Decrease the page size

(ii) Increase the main memory size

(iii) Replace FIFO by LRU

(iv) Go for multitasking.

(b) The page reference pattern of a program is as follows :

1, 2, 3, 4, 1, 5, 2, 3, 6, 5, 4, 1, 6, 2, 5, 4

which of the page replacement policies FIFO, LRU and

LIFO is most suitable with memory capacity 4 pages?

(c) In a two level virtual memory tA1

= 10–3 sec and

tA2

= 10–2 sec what must be the hit ratio H in order the

access efficiency to be within 80% of its maximum

possible value? 8+6+6

( 4 )

(b) The interface for a static memory costs Rs. 10/-

compared to Rs. 50/- for a dynamic memory and if static

memory costs Rs. 0.0002 per bit and dynamic memory

costs Rs. 0.0001 per bit, determine how many bits must

be in a memory module to make dynamic memory less

expensive.

(c) The memory stack in a 16-bit computer contains 5A14H.

The stock pointer contains 3A56H. A two word call

subroutine instruction is located at memory address 013EH.

followed by the branch address of 67AEH at memory

address 013FH. What are the contents of PC, SP and the

memory stack?

(i) Before the CALL instruction is executed.

(ii) After the CALL instruction is executed.

(iii) After the RETURN from subroutine

(iv) After the second RETURN from subroutine

following the one in part (iii). 5+5+10

7. (a) Describe Booth’s modified algorithm and show that just

N

2 partial products are required to multiply two N bit

binary numbers. Illustrate the algorithm with the example

of multiplication of +29 and –35.

(b) Draw the schematic diagram for daisy chain polling

arrangement in the case of non-vectored interrupt for

three devices. 10+10

––––––

( 3 )( 2 )

[ Turn over

2. (a) What is the difference between a subroutine and an

interrupt service routine ?

(b) Design an ALU with three control lines C0, C

1, and C

2

and one carry input line and two n-bit binary inputs A

and B to perform the following operations (show the first

two stages).

C2

C1

C0

Operations

0 0 0 A+B

0 0 1 A–B

0 1 0 A+1

0 1 1 A–1

1 0 0 A and B

1 0 1 A or B

1 1 0 A XOR B

1 1 1 Complement A

5+15

3. (a) Consider a 20-bit floating point number in a format with

7-bit exponent and a 12-bit normalised fractional

mantissa. The base of the scale factor in 4 and the

exponents is represented in excess-64 format

Find the values of (A+B) and (A–B) where

A = 0 1 0 0 0 0 1 0 1 1 1 1 1 1 1 1 0 0 1 1

B = 0 0 1 1 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1 1

which are represented in the above format and give the

answers in normalised form. Use rounding method for

truncation.

(b) Draw the CSA organisation to add 9 signed numbers of

4-bit each having ripple carry adder at the last stage.

Also calculate the number of gate delays in your addition

process. 10+10

4. A control unit has two inputs X and Y and eight-states. The

control state diagram is as follows :

T0 T1 T2

T3 T4

T5 T6

T7

y=0

x=0

x=1y=1

(a) Design the control using eight D flip flops.

(b) Design the address sequencing part of microprogram

control. 10+10

5. Write short note on any two of the following : 10×2

(a) Non-restoring algorithm for binary division.

(b) Direct memory access.

(c) Techniques of truncation used for floating point

arithmetic.

6. (a) What are the differences between asynchronous and

synchronous mode of data transfer.

ExMCA/121/46/2006

MCA FIRST YEAR EXAMINATION, 2006 (2nd Semester )

DATA STRUCTURE Time:Therr hours Full Marks:100

Answer any five questions

1 a) i) Define ‘Dala Structure’ and ‘Algorithm’. ii) Define ‘Stack’ as an ADT. 2+2+6

b) i) Define ‘Time.: Complexity’ of an Algorithm. ii) Assume that Module A takes t units of time.for its execution.where t is a constant and that n is the

size of die input data.and p is a positive integer greater than 1 Find the complexities of the following algorithms

Algorithm 1:

1 repeat for i = 1 to n

2 repeat for j =1 to n

3 repeat for k = 1- to n

4 Module A (end of step 3 loop)

( end of step 2 loop) ( end of step 1 loop) 5 exit

Algorithm 2: 1. set j= l 2. repeat steps 3 and 4 whilej = n 3. Module A 4. set j = p x j

(end of step 2 loop) 5. exit

2+4+4 2. The Tower of Hanoi problem may bo stated in.a general way as follows :

“ A tower of ‘n’ disks is initially stacked in order of decreasing diameter tin one of three available pegs ( say, peg’ a, peg b, and pegc ). The task is transfer the entire tower of disks from one peg ( say, peg a )to another peg. say,peg c ) using the lie remaining available peg ( say, peg b ) so that only one disk can be transferred at one time and a larger disk can never be placed or. top of a smaller disk ,duing this process of transfer.”

[ Turn, Over ]

(2)

i) Obtain a recursive definition of the problem in terms of a disk movement function say, move(n, x, y, z ) that causes moving of’ ‘n’ disks from peg to peg y using the available peg peg z

ii) Write a ‘C’ function for ‘move’. iii) Estimate the time compleity of this ‘move’ function.you have just written. 5+5+10

3. a) Discuss whether a Slack or Queue is the appropriate structure for determining the order in which dements are processed in each of the following cases:

(i) Batch computer programs arc submitted to the computer center. (ii) Program P calls subprogram S which calls subprogram T. and so on. 3+3

b) The daily flights of an airline company is as shown below. Here. ‘City’ lists the cities, and Org[i] and Dst[i] denotes the origin and destination, respectively of the flight Number[i]. Drawthe corresponding directed graph of data.

City

1 kolkata

2 Mumbai 3 Chennai

4 Delhi 5 Hyderrab

ad

Number. Org Dst 1 501 2 3 2 502 3 2 3 505 5 3 4 508 3 4 5 511 2 5 6 512 5 2 7 513 5 1 8 515 1 4 9 517 5 4 10 518 4 5

c) Discuss the different way of representing the above data so as to decrease the time of execution for the following cases: (i) Find the origin and destination of a flight. given the flight number (ii) Given City X and City Y , find whether there is a flight from X to Y , and if there is find the

flight number. 4+4 [ Turn Over ]

6

(3)

4. (a) What are the means/mechanisms required for linked representation? (b) Propose a space and time efficient node structure in C for linked list representation of a Sparse

Matrix. (c) Write the rules for transforming a recursive function to a non-recursive function. (d) Give the best and tho worst binary tree representation of the following sorted array :

47 86 98 120 135 142 162 6+6+4+4

5.a) What is a binary tree? What are the differences between a tree and a binary tree? b)If a complete binary tree with n nodes is represented sequentially then for any node with

index i 1 = i = n,show that “leftchild(i) is at 2i if 2i = n. If n = 2i. then i has no left child “.

c)Develop algorithms for building a binary tree for an expression and retrieving the infix.from from this tree 2+2+6+5+5

6 i) Define Symbol Table’. State the operat ions thai may be required on Symbol Table. What is a Dynamic Symbol Table? 2+4+2

ii) Consider that the following data are supplied in the sequence. Slate the rules for balancing a tree and show now the binary seareh tree generated in sequence with these data gets unbalanced and subsequently balaneei,

Data : Mar. May. Nov, Aug. Apr, Jan, Dec. July. Feb. June. Oct. Sep 4+8

7. a) Explain, with an example, how data are represented for Fibonacci Search. State the advantage of Fibonacci Search over Binary Search. 8+2

b) Define ‘Heap’ Explain, with an example. how heap sort works. 2+8

8. Write notes on the following:

i) B-Tree and 2-3 Trees ii) Graph Algorithms 10+10

CP 21 A/12/2005

INTER ENGG. (COMP. SC. & ENGG.) EXAMINATION, 2005

(1st Semester)

DATA STRUCTURES AND ALGORITHMS

Time : Three hours Full Marks : 100

Answer question no. 1 and any four from the rest.

1. (a) Find the new heap created by removing the first item from the following heap: 650 88 55 68 1 3 11. 2

(b) Draw a hash table with open addressing and a size of 11. Use the “modulo 11” hash function to insert the following keys in the given order into your table:

7, 24, 0, 29, 22, 9, 33. 3

(d) Explain with examples, in which cases a recursive function will not terminate. 4

(e) Show how the following polynomial can be efficiently represented: 15x90 – 10x12 + x2 – 20 2

(f) Show how the following expression can be converted to postfix notation: x + y * 5/(2 + z ) – 3*(x-z)–p$ ,

where $ is the sentinel. Hence evaluate the postfix expression with the following values of the variables: x=20, y=4, z=2, p=l. 5

(g) What do you mean by a Transitive C’osure Matrix? Explain with an example. 4

2. Define the ADT Queue. Implement the Queue Data Structure using pointers in C. 20

3. What are the uses of the stack data structure? Explain how recursive subroutines can be implemented using stack.

State and explain with a simple example how you can use a stack for converting an infix expression to the postfix notation. 10+10

4. What are the problems of Binary Search Tree? Explain the improvement of performance by the use of Height Balanced Tree.

Explain how a height–balanced tree can be formed by inserting the following elements in the given order:

1 ,2 ,3 ,4 ,5 ,6 ,8 ,9 ,10,7,11. Show how the root element can be deleted from the above tree. 6 + 10 + 4

contd.

(2)

5. Explain the rationale of Quicksort. Why does the algorithm perform so fast? What are the cases when the Quicksort algorithm behaves like a slow sort? What is the effect of the choice of pivots on the performance of Quicksort algorithm?

Describe the algorithm of Quicksort and explain its working with the help of the following input array:

23,4,55,6,66,7,77,8,88,90. 10+ 10

6. What is a Graph? How is it represented as a data structure? Write an algorithm for Breadth First Search of a Graph. Show how the algorithm works on the following graph:

20

7. What are the problems of Binary Search Tree? Explain the improvement of performance by the use of Height Balanced Tree. Explain how a height – balanced tree can be formed by inserting the following elements in the given

order: 4, 5, 7, 2, 1, 3, 6, 15, 10.

Show how the root element can be deleted from the above tree. 20

———X———

CP 21 A/12/2006

INTER ENGG. (COMP. SC. & ENGG.) EXAMINATION, 2006 (1st Semester)

DATA STRUCTURES AND ALGORITHMS Time : Three hours Full Marks : 100

Answer question no. 1 and any four from the rest. 1. (a) Show the 2-3 tree formed by entering the following characters in the given sequence into an initially empty tree:

A B C D E F G H I. 2 (b) What do you mean by the notation O(f(x))? Prove that

O(f(x)) + O(g(x)) = O(max(f(x), g(x)) 5

(c) A sparse matrix is represented by the following triples; find the original matrix: (6, 5, 6), (1,3, -4), (2, 1, 2), (2,4, 10), (4,2, 50), (4, 5,29), (5, 4, 33). 2

(d) Show how the following postfix expression will be evaluated: 6 3 5 + * 22 4–36+ //$

where $ is the sentinel. 2

(e) What do you mean by a Transitive Closure Matrix? Explain with an example. 3

(f) What is a synonym? Explain. 2

(g) What is a Priority Queue? 4

2. Define the ADT for Doubly Linked List. For a C pointer based linked representation of a Doubly Linked List, write the functions for the following operations:

i) Insert a new node pointed to by target before an existing node pointed to by cur. ii) Delete a node pointed to by cur.

10+5+5 3. Why is Stack an important Data Structure? Is it possible to implement the Single Dimension Array

Data Structure using a Stack? If possible, how? State and explain with a simple example how you can use a stack for converting an infix expression to the postfix notation. 10+10

4. What is a Binary Search Tree (BST)? What are the operations on BST? Explain how a given data can be deleted from a BST. What are the average time complexities for different operations on BST? Explain the problem of inefficiency cropping up by inserting the following elements in the given order in a BST:

1,2,3,4,5,6,8,9,10,7,11. How can the problem be solved? 12 + 8

contd.

( 2 )

5. Explain the rationale of Heapsort. What are the different approaches to develop the algorithm for Heapsort. Explain with an informal analysis, the time complexity of Heapsort.

Describe one algorithm of Heapsort and explain its working with the help of the following input array: 23, 33, 13, 83, 43, 93, 53, 73, 100.

12 + 8

6. What are the different kinds of Recursion? Explain with examples. Write a recursive algorithm for Depth First Search of a Graph. Convert the algorithm to an iterative one. Take an example graph and show how the algorithm works.

8 + 12

7. What do you mean by Hashing? What is the complexity of insertion, deletion and search in a hash table? Explain how you can delete an element from a hash table. Explain with an example, how coalesced chaining works.

What are the advantages and disadvantages of Quadratic Probing and Double Hashing? Explain with their definitions.

12 + 8

––––––––X––––––––

Ex/CP 42B/ 25/2005

B.C.S.E. FINAL EXAMINATION, 2005

(2nd Semester)

DESIGN AND ANALYSIS OF ALGORITHMS

Time: Three Hours Full Marks 100

Answer any five questions.

1. (a) Discuss the different ways of measuring work done by an algorithm. Which one is most commonly used and why?

(b) What do you mean by optimality? Write the Binary Search algorithm and prove its optimality.

(4+2) + (2+4+8) = 20

2. (a) Discuss what you mean by best case, worst case and average case analysis of an algorithm.

(b) What is the difference between average case analysis and amortized analysis? Briefly describe the three common techniques used in amortized analysis.

(c) Find the amortized cost of incrementing a binary counter using potential method. 4 + (2+6) + 8 = 20

3. (a) What do you mean by the statement: The running time of algorithm A is T(n) = Θ (n2)? Use diagram to explain your answer.

(b) What is the difference between O - notation and o- notation? (c) What is a recurrence? Solve the following recurrence relation using iteration method.

T (n) =3T(n/4) + n. (d) Give recursion tree for the recurrence relation: T(n) = 2 T(n/2) + n2 .Apply Master

Theorem to solve the recurrence. 6 + 2 + (2 + 4) + (2 + 4) = 20

4. (a) Compare Divide and Conquer technique of algorithm design with Dynamic Programming. What are the two key ingredients that an optimization problem must have for dynamic programming to be applicable?

(b) Discuss the different submodels of PRAM. (c) Write a PRAM-based sorting algorithm. (d) Discuss the Bulk Synchronous Parallel Computer (BSP) model. (e) Compare BSP with PRAM model.

6 + 4 + 4 + 3 + 3 = 20

-2-

5. (a) Give an algorithm which sorts in linear time. Explain the functioning of the algorithm with examples. How does it differ from the algorithms like Merge Sort and Heapsort?

(b) What is a heap? What is the partial order tree property of heap? (c) Give an exact analysis of the cost of building a heap. comment on the running

time of Heapsort. (d) What is a recursion tree?

(3 + 3 + 2) + 4 + (4 + 2) + 2 = 20

6. (a) Give a BSP implementation of Merge Sort algorithm. What is the estimated computational cost of the algorithm on a Sun SPARC server having two processors with BSP parameters as follows: g = 3.5, l = 125 (values are given in time units)? Assume that the algorithm runs on 2 processors for an input of size n = 10. (b) How does memoization differ from usual dynamic programming approach? Give

the pseudo-code of memoized matrix-chain algorithm. (c) Discuss the worst case behaviour of Quicksort. Draw a recursion tree to explain

the worst case behaviour.

(4 + 4) + (2 + 4) + 6 = 20

7. (a) Define the classes P and NP. Discuss what you mean by Polynomial Reductions. (b) What are the different steps taken by Nondeterministic algorithms? Give a

nondeterministic Graph-coloring algorithm. (c) Prove that Hamiltonian cycle problem in NP-complete.

(3+3) + (2+4) + 8 = 20

8. (a) Write a greedy algorithm for generating Huffman code. Comment on the running time of the algorithm.

(b) Prove the correctness of Huffman's algorithm. (4+2)+14 = 20

Ex/CSE/T/214/17/2010

BACHELOR OF COMPUTER SC. ENGG. EXAMINATION, 2010

(2nd Year, 1st Semester)

DIGITAL CIRCUITS

Time : Three hours Full Marks : 100

Answer any five questions.

1. a) What are the problems associated with DCTL gates?How are they resolved? 4+2

b) Explain the operations of an RTL gate. How do youestimate the fan out of a standard RTL gate? 6+4

c) What happens when outputs of two RTL gates areshorted? What are its merits and demerits? 2+2

2. a) What are the Transfer characteristics of a logic family?4

b) Explain the transfer characteristics of a standard TTLgate. 16

3. a) Explain the operation of an nMOS Inverter. 8

b) Explain its transfer characteristics. 4

c) How can the universal logic gates be implemented with

the same? 4[ TURN OVER ]

( 2 ) ( 3 )

d) Realise X (A B).C D.E= + + using a single n MOS

gate. 4

4. a) What are the various building blooks of a PLL? Explain

their operations. 9

b) How does a PLL operate? 5

c) How can a input frequency be multiplied by π ? 6

5. a) Explain the operation of a 3 Tr/cell RAM. 8

b) How is the information retained by the above? 8

c) What happens during Read operation of an 1 Tr/ cell

RAM? 4

6. a) Explain the operation of a buffered weighted register

type DAC. 8

b) How can offsets be introduced in such converters? 4

c) How can a 3 bit signed binary number in 1’S

complement representation be converted to analog

voltages? 8

7. a) Explain the operation of a 3bit direct comparison type

ADC. 8

b) Design the encoder circuit. 4

c) How can a 6 bit ADC be designed by using above

mentioned converters? 8

8. Write notes on any four of the following : 4x5

a) I2 L;

b) HTL and its transfer characteristics;

c) Tristate gates;

d) NAND & NOR gates using c MOS;

e) 555 IC Timers;

f) EA PROM’s;

g) Bipolar Switches for DAC’S;

h) Delta Modulation.

————×————

Ex/CP 22B/46/2005

INTER ENGG. (COMPUTER SCIENCE & ENGG.) EXAMINATION, 2005

( 2nd Semester )

DIGITAL CIRCUITS

Time : Three hours Full Marks : 100

Answer any five questions.

1. (a) With the help of a circuit diagram explain the operation of an Integrated version of DTL gate. 12

(b) Extimate the reverse recovery current. 4

(c) What happens if the output of more than one gates are storted ? 4

2. (a) Explain the operation of a TTL gate. 8

(b) What modification is required for wired-OR connection. 4

(c) A wired-OR circuit has fan-in and fan-out of 4 and 3 respectively. Estimate the values of the pull-up resistor. 8

3. (a) Explain the operation of an nMOS inverter. 8

(b) What are its demerits ? 2

(c) Estimate voltage rise time of an MOS inverter in terms of the circuit parameters. 8

[ Turn over

( 2 )

(d) How can the function f = be implemented by a single MOS gate ? 2

4. Explain the operation of a 555 IC timer and Show how it can be used as an Astable multivibrator. Design a clock generator working at 1 KHz with 50% duty cycle using C=0.01 µf. Deduce the expressions used. 6+6+4+4

5. (a) Explain the operation of a static MOS memory cell. 10

(b) Show how can a 16 k×16bit memory system be implemented by using 4k × 4bit memory chips ? 4

(c) How can the above memory system be made non-volatile ? 6

6. (a) How can a digital data be converted to an Analog voltage using weighted resistors ? 10

(b) How can you introduce offset in such convenors ? 4

(c) Show how a 3 bit signed binary number in 1’s complement representation be converted to an analog voltage ? 6

7. (a)Explain the operation of a 3 bit parallel ADC. 8

(b) Design the encoder circuit. 4

(c) How can a 6 bit ADC be designed by using 3 bit parallel converters ? 6

(d) What are its advantages and disadvantages ? 2

( 3 )

8. Write short notes on any four of the following :

(a) Comparison of logic families ; (b) I2L;

(c) CMOS gates and its advantages; (d) PLL; (e) EPROM’s and EAPROM’s ; (f) Bipolar switches for DAC’s ; (g) Sample and Hold Circuits ; (h) Analog Multiplexers. 4 × 5

EX\CP22B\48\06

INTER ENGG. (Computer & Engg.) EXAMINATION, 2006 2nd Semester

DIGITAL CIRCUITS

Time : Three hours Full Marks : 100

Answer any five questions.

1. a) Explain the operation of a positive logic AND gate using diodes. 4

b) How can this be modified to implement a universal gate ? 2+8 From the transfer characteristics estimate the Noise Margins of the same at 25°C. 6

2. Explain the transfer characteristics for a TTL gate. 20

3. a) With the help of circuit diagram explain the operation of a CMOS inverter. 8

b) What is the power dissipation of a CMOS gate in steady state ?

Does it consume any power ? If yes, when and flow ? 6

c) Explain the operations of CMOS NAND and NOR gates.

4

[ Turn Over ]

(2)

4. a) Design a clock generator working at 20 KHz having a duty cycle of 30% with a 555 IC timer chip, (use C = 0.01 µf). Deduce the expressions used. 4+6

b) With the help of a block diagram explain the operation of a single chip PLL. 6+4

How can an input frequency be multiplied by 2π ?

5. a) Explain the operation of a 3 tr/cell RAM.

How is the information retained by the same.

b) What happens during Read-out operation of a 1 tr/cell RAM ? 6+8+6

6. a) Explain the operation of a Buffered weighted resistor type DAC.

b) How can a two digit BCD number be converted by using 4 bit DAC’s ? 12+8

7. Explain the operation of a 3 bit successive Approximation type ADC.

What are its relative merits and demerits ? 16+4

8. Write notes on any four of the following : 4x5 a) l2L e) EPROM b) RTL f) Non volatile RAM c) ECL g) Switches for DAC’s d) MOS inverter h) S/H gate

Arabinda

Sticky Note

Ex/CP 220/110/2007 (Old)

INTER COMPUTER SCIENCE & ENGG. EXAMINATION , 2007

( 2nd Semester )

(Old Syllabus)

DIGITAL CIRCUITS

Time : Three hours Full Marks : 100

Answer any five questions.

1. (a) With the help of a circuit diagram explain the operation of an

Integrated Version of DTL gate. 12

(b) Estimate the reverse recovery current. 4

(c) What happens if the outputs of more than one gates are

shorted? 4

2. Draw the Transfer characteristics of a standard TTL gate. Justify

the diagram. 4+16

3. (a) Explain the operation of an MOS inverter. 8

(b) What are the demerits of the same ? 2

Justify your answer with necessary deduction. 8

(c) How can they be resolved ? 2

4. (a) Draw the block diagram of the 555 IC Timer and explain its

operation. 8

(b) How can you connect the same to generate a Time delay ? 2

Deduce the expression for the same. 6

(c) Design a circuit to produce a time delay of 80 ms.

[use C=.01µf] 4

5. (a) With the help of a circuit diagram explain the operation of

3 Tr/cell Memory. 8

(b) How can the stored information be maintained in such a

Memory ? 8

(c) How does it differ from a 1 Tr/cell Memory ? 4

6. (a) Explain the operation of weighted resistor DAC. 12

(b) Design a two digit BCD D/A converter. 8

7. (a) Explain the operation of a Ramp type ADC. 12

(b) Why is it also called staircase type ADC ? 2

(c) What are its relative merits and demerits ? 6

8. Write short notes any four of the following : 4×5

(a) RTL ;

(b) CMOS ;

(c) PLL ;

(d) ROM/PROM/EPROM’S ;

(e) ECL ;

(f) Bipolar switch for DAC ;

(g) Sample/Hold circuit ;

(h) Delta Modulation.

––––––

[ Turn over

( 2 )

Ex/CSE/T/21D/15/2008

INTER COMPUTER SC. & ENGINEERING EXAMINATION, 2008

( 1st Semester )

DIGITAL CIRCUITS

Time : Three hours Full Marks : 100

Answer any four questions

1. a) With the help of a circuit diagram explain the operation of

an Integrated version of DTL gate. 12

b) Why does it perform better than the discrete version ?4

c) What are its disadvantages ? 4

2. a) How can the disadvantages of the DTL gates be resolved

in TTL gates ? 8

b) Draw and explain the transfer characteristics of a standard

TTL gate. 12

3. a) Explain the operation of an nMOS Inventer. 8

b) Explain its transfer characteristics. 4

c) How can NAND and NOR operations be performed by n

MOS devices ? 4

d) Realise X A B (C D) E= ⋅ + + ⋅ using a single nMOS gate ?

4

4. a) With the help of a block diagram explain the operation of

a PLL. 12

[ Turn over

b) How can an Input frequency be multiplied by 2 ? 8

5. a) With the help of a circuit diagram explain the operation of

a 3 Tr/Cell Memory. 10

b) How can the stored information be maintained is such a

memory ? 6

c) How does it differ from a 1 Tr/cell memory ? 4

6. a) How can a digital data be converted to an Analog voltage

using buffered weighted resistors ? 10

b) How can offsets be introduced in such converters ? 4

c) How can a 3bit signed number in 1’s complement

representation be converted to Analog Voltages ? 6

7. a) Explain the operation of a 3 bit successive Approximation

type ADC. 12

b) What are its relative merits and demerits ? 4

c) Explain the functions of various interfacing signals

generally used in such converters. 4

8. Write notes on any four of the following :

a) RTL’s ;

b) Tristate gates ;

c) ECL gates ;

d) CMOS gates ;

e) EPROM’s ;

f) Bipolar suitables for DAC’s ;

g) Sample/Hold circuits ;

h) Delta-modulation.

[ 2 ] [ 3 ]

Ex/CSE/ET/T/216/18/2010

BACHELOR OF COMPUTER SC. ENGG. EXAMINATION, 2010

(2nd Year, 1st Semester)

ELECTRONICS – II

Time : Three hours Full Marks : 100

Answer any five Questions

1. a) What is an amplifier? How amplifier circuits can beclassified? 1+3

b) With a neat circuit explain the operation of a class Apower amplifier. Prove that the efficiency of class Apower amplifier is 25%. 4+8

c) With a neat circuit explain the operation of acomplementary symmetry push-pull class B poweramplifier. 4

2. Draw the circuit of a two stage R.C. coupled amplifierand explain its operation. With proper assumptionsusing h-parameter analyze the gain frequency responseof an R.C coupled amplifier in the mid, low and highfrequency ranges. 6+14

3. a) How oscillators can be classified? Also explain how anoscillator circuit produces oscillation without anyexternal input? 2+4

b) With a neat circuit explain the operation of a WienBridge oscillator. Derive an expression for its frequency

[ TURN OVER ]

and also find out the condition for sustaining the

oscillation. 5+3+2

c) Write down the advantage and disadvantages of a

crystal oscillator. 4

4. a) Draw the basic building block of an op-amp and explain

the function of each block. 2+4

b) Define the following terms related to an op-amp.

i) Slew Rate (ii) Common Mode Rejection Ratio,

(iii) Offset voltage and (iv) Virtual ground. 8

c) How an op-amp can be used as an integrator? 6

5. a) Design a first order Butter worth band pass filter having

lower and higher cut off frequencies of 1 KHz and 10

KHz respectively with a pass band gain of 4. Also

determine whether it is a wide band pass or narrow

band pass filter. 10+2

b) What do you mean by order of a filter? How a fourth

order high pass filter can be realized? 2+4

c) Write down some advantage of active filter over a

passive filter. 2

6. a) Draw the functional block diagram of a 555 timer and

explain how this circuit can be modified to design an

astable multivibrator. 4+6

b) In a astable multivibrator time resistors are 4K Ω and

6K Ω respectively and the timing capacitor is 0.1/ µF.

Calculate the duty cycle and frequency of the generated

waveform. 5

c) With a neat circuit explain the operation of a schmitt

trigger. 5

7. a) Mention the role of a regulation in a power supply.

Define the terms load regulation and line regulation.

Draw the circuit of a shunt voltage regulator and explain

its operation. Mention its advantage over a shunt

regulator. (2+2) + (8+2)

b) Draw the circuit of a regulated power supply that can

give an output of ± 15V 6

8. Wirte short notes on any two of the following :

10x2 = 20

a) Bistable Multivibrator.

b) Switching Mode Power Supply (SMPS)

c) Transformer coupled amplifier.

d) Crystal oscillator.

( 2 )

————×————

( 3 )

Ex/CSE/ET/T/21F/16/2008(S)

INTER COMP. Sc. & ENGG. EXAMINATION, 2008(1st Semester, Supplementary)

ELECTRONICS–II

Time : Three hours Full Marks : 100

Answer any five questions.

1. a) What is an amplifier ? How amplifiers can be classified ?

With a neat circuit explain the operation of a Class A

power amplifier. 2++2+6

b) With a neat circuit explain the operation of a two stage

R-C coupled amplifier. Also draw its gain frequency

response. 8+2

2. a) What is an oscillator ? How oscillators can be classified?

Write down the conditions for oscillation of an oscillator

circuit. 2+2+2

b) With a neat circuit explain the operation of colpitt

oscillator. What are its drawback and how these can

overcome in a Hartley oscillator ? 6+2+2

c) Explain the operation of a crystal oscillator. 4

3. a) Write down the characteristics of an ideal op-amp. Also

draw the equivalent circuit of an op-amp. 3+3

b) Find out an expression for feedback gain of an op-amp

when used in non-inverting mode. 6

[ TURN OVER ]

c) How an op-amp can use to add three voltages Va , Vband Vc. 8

4. a) Design a 1st order low pass Butterworth Filter with a

cut-off frequency of 1 kHz and having a pass band gain

of 3. 8

b) What is an active filter ? Mention its advantages over its

passive counterpart. Also write down the meaning of the

term ‘order of a filter’. 2+4+2

c) Mention uses of a filter. How filter circuit can be

classified ? 2+2

5. a) Draw the functional block diagrams of a 555 timer and

explain its operation. 6

b) How a monostable multivibrator circuit can design using

a 555 timer. How an astable multivibrator differs from a

monostable multivibrator. Also mention their applications.

8+3+3

6. a) Draw the basic building block of a power supply. Define

the terms (i) Load regulation and (ii) Line regulation of

a d.c. power supply. 4+4

b) Draw the circuit of a voltage regulator using op-amp and

explain its operation, mention the advantage of a series

regulator over a shunt regulator. 8+4

7. a) Define the following terms recontrol to an op-amp.

(i) CMRR ; (ii) Show Rate ; (iii) Offset voltage (iv) Virtual

ground. 2×4=8

b) How an op-amp can be used as an integrator. 6

c) How an op-amp can be used as a voltage follower. 6

8. Write short notes on any two of the following : 2×10=20

a) Schmitt trigger

b) Fixed Voltage Regulator

c) Astable Multivibrator

d) Wien Bridge Oscillator

—————×—————

( 2 ) ( 3 )

Ex/CP 21C/60/2008 (Old)

INTER ENGINEERING (C. S. E.) EXAMINATION, 2008

( 1st Semester, Old )

ELECTRONICS II

Time : Three hours Full Marks : 100

( 50 marks for each part )

Use separate Answer-Script for each part

PART - I

Answer any five questions

1. a) How a transister can be used to design an amplifier circuit ?

Make a comparative study between class A, Class B, Class

AB and class C amplifier. 3+4

b) With a neat circuit explain the operation of a class B ush pull

amplifier and prove that it efficiency is 78.5%. 6+7

2. Draw the circuit diagram of a two stage R-C coupled amplifier

and explain its operation. Explain why gain falls below and above

cut-off frequency. Make a comparative study between a R-C

coupled amplifier and a transformer coupled amplifier.

4+6+6+4

3. How an oscillator can be classified ? Write down the condition

for oscillation in an oscillator circuit. What are the drawbacks of

these LC and RC oscillators ? How it can overcome by using a

crystal oscillator. Draw the circuit of a crystal oscillator and

explain its operation. Also mention some of its advantage and

disadvantages. 2+2+2+2+8+4

[ Turn over

80

4. a) Write down the characteristics of an ideal op-amp. 3

b) Define the following terms related to an-op amp.

(a) Stew Rate : (b) Offset voltage, (iii) virtual ground. and

(iv) Common Mode Rejection Ratio (CMER) 452=8

c) Find out an expression for feedback gain of an op-amp. usedact inverting mode. 6

d) Why an-op-amp. is not generally used in open loop mode.3

5. a) Draw the functional block diagram of a 555 timer andexplain its operation. How 555 timer can be used to designan astable multivibrator. 6+8

b) How an op-amp can be used as an integrator ? 6

6. a) Draw the basic building block of an unregulated dc. supply.Why regulation is require ? How many types of regulators

are there ? Draw the circuit of a series regulator andcompare its operation with that of a shunt regulator.

3+2+2+4+4

b) Draw a schematic diagram of ± 15 volt dual power supply..5

7. a) Draw the gain frequency response of an op-amp. and explain

how the gain frequ. response can be improved ? 2+4

b) Explain the operation of a common drain PET amplifier andfind out an expression for its gain. 4+4

c) With a neat circuit explain the operation of a bistablemultivibrator. 6

[ 2 ] [ 3 ]

8. Write short notes on any two of the following : 2510=20

a) Schmitt trigger circuit.

b) 1st order law pass Butterworth fieter.

c) Design of a variable power supply with IC-723.

d) R-C phase shift oscillator and its analysis.

Ex/CSE/ET/T/21F/16/2008

INTER COMPUTER SC. & ENGG. EXAMINATION, 2008

(1st Semester)

ELECTRONICS–II

Time : Three hours Full Marks : 100

Answer any five questions.

1. a) How amplifiers can be classified ? With a neat circuit

explain the operation of a class B push-pull amplifier.

Prove that the efficiency of a class B amplifier is 78.5%.

2+6+6

b) Explain how negative feedback to an amplifier reduces

the gain and increases the bandwidth. 6

2. a) Make a comparative study between a transformer coupled

amplifier with an RC coupled amplifier. 6

b) Draw the gain frequency response of an R–C coupled

amplifier. Define the half power frequencies. Explain why

gain falls at both low and High frequency region of

operation of an R–C coupled amplifier. 2+2+10

3. a) With a neat circuit explain the operation of R-C phase

shift oscillator. Find out an expression for frequency of

oscillation and condition for sustaining the oscillation for

R-C phase shift oscillator. 6+6

[ TURN OVER ]

( 2 ) ( 3 )

b) Mention the drawback of L.C. or R-C oscillators and how

it can overcome in a crystal oscillator. Explain the

operation of a crystal oscillator. 8

4. a) Draw the basic building block of an op-amp and explain

the function of each block. 6

b) Find out an expression for feedback gain of an op-amp

when used in inverting mode. 6

c) How an op-amp. can be used as a voltage follower ?

Mention its use. 6+2

5. a) Design a 1st order Butterworth bandpass filter with lower

and upper cut-off frequencies are 1 KHz and 4 KHz and

having a passband gain of 4.

Also, show the necessary change in the component

values to convert the upper cut-off frequency from 4 KHz

to 6 KHz. 8+4

b) What is an active filter ? Mention its advantages over its

passive counterpart. What do you mean by the

termsorder of a filter ? 2+4+2

6. a) Draw the function block diagram of a 555 timer and

explain its operation. 6

b) Design an astable multivibrator circuit of frequency 10

KHz and duty cycle 60%. Using 555 timer. 10

c) Make a comparative study between monostable,

bi-stable and astable multivibrator circuits and write down

atleast one application for each of them. 4

7. a) Draw the circuit of a shunt voltage regulator and explain

its operation. Mention its advantage over a series

regulator. 8+2

b) How a variable voltage regulator circuit can realize by

using IC-723. 10

8. Write short notes on any two of the following : 2×10=20

a) Bistable multivibrator

b) Schmitt trigger

c) Fixed voltage Regulator

d) Switching Mode Power Supply (SMPS)

—————×—————

Ex/CP21C/12/2006

INTER COMPUTER SC. ENGG. EXAMINATION, 2006

( 1st Semester )

ELECTRONICS - II

Time : Three hours Full Marks : 100

Answer any five questions

1. a) Draw the basic building block of an operational amplifier

and explain the function of each block. 8

b) Draw the equivalent circuit of an op-amp and write down

the characteristics of an ideal op-amp. 3+3

c) Find out an expression for feedback gain of an op-amp.

When connected in inverting mode. 6

2. a) How an op-amp can be used as a voltage follower. Mention the use of a voltage follower circuit. 4+2

b) How are op-amp can be used as an integrater. 8

c) Design a circuit using op-amp which can add the three

numbers 29, 15 and 16. 6

3. a) What is an active filter ? Mention some of its advantages.

Design a first order band pass filter with the cut-off

frequencies are 200 Hz and 2 KHz, with a pass band gain

of 4. Calculate (2+2)+(6+2+4)

i) the value of Q for the filter

ii) Draw the frequency response plot of this filter.

b) How you can realize a 3rd order Low pass Bertterworth

filter. 4

[Turn over

[ 2 ]

4. a) Write down the conditions for oscillations in an oscillater

circuit. How oscillaters can be classified ? With a neat

circuit explain the operation of wien bridge oscillator.

Mention its advantage and disadvantages. 3+3+6+2

b) What is crystal oscillator ? Mention its advantage and

disadvantages. 4+2

5. a) Draw the functional block diagram of a 555 timer and

design a monostable multivibrator with the help of it.

4+6

b) In a monostable multivibrator, a resistor of value 10KΏ

and a capacitor of 0.1.Fµ are connected externally.

Calculate the duration of the output pulse. 4

c) In a schmitt trigger circuit 1 volt peak to peak sine wave

is applied at the imput and the supply voltage is ±15V.

Determine the threshold voltages Vut and Vlt, When

R1=100Ώ and R2=56Ώ are connected as a voltage divider

at the non-invert input. Also draw the output waveform. 4+2

6. a) Make a comparative stardy between class A, class B, class

AB and class C amplifiers. What is multistage amplifer? 6+2

b) With a neat sketch explain the operation of a two stage

R-C compled amplifier. Draw the gain frequency response

of the amplifier and define the two cut-off frequencies.

8+4

[ 3 ]

7. a) Make a comparative strdy between a series regulator and

a shunt regulator. What do you mean by toad registration

and line registration. 8+2

b) With a neat circuit explain the operation of a switching

mode power supply (SMPS). 10

8. Write short notes on any two of the following : 2×10

a) Gain frequency response of op-amp and improvement of

its bandwidts.

b) R-C phase shift oscillater and its analysis.

c) Common drain FET amplifier.

d) Astabe multivibrator.

e) Schmitt trigger.

[ Turn over

Ex/CSE/Math/T/211/17/2010

BACHELOR OF COMPUTER SC. & ENGG. EXAMINATION , 2010

(2nd Year–1st Semester)

MATHEMATICS-VD

Time : Three hours Full Marks : 100

(50 marks for each part)

Use a separate answer-scirpt for each part.

PART-I

Answer any five questions.

1. Solve :

(i)d ydx

2

2 +n2y = sec nx

(ii) (D 2+D)y = x cos x. 5+5

2. Using the method of variation of parameter, solve

(i) x2 d ydx

xdydx

2

2 2FHG

IKJ

− FHG

IKJ +2y = x+x2 logx+x3

(ii) (x4D4+6x3D3+9x2D2+3xD+1) y = (1+logx)2. 5+5

3. Verify that the origin is a regular singular point of

2x2y"+xy'–(x+1)y = 0

and find two independent Frobenious series solutions of it. 10

( 2 )

4. Solve the Legendre differential equation

(1–x2) d ydx

xdydx

2

2 2− +n(n+1)y = 0,

where n is an arbitary constant. 10

5. (i) Show that

(1–2xz+z2)–½ = z xx

zn

nn

P ( ),| |

| |

≤<=

∝

∑ 1

10

Pn(x) is Legendre polynomials.

(ii) Expand f(x) = Ax2+Bx+C (0<x<2π ) in Fourier series.

5+5

6. (i) Show that

tan–1x = x– x x x x3 5 7

3 5 71 1+ − + − ≤ ≤L, .

(ii) If f is bounded and integrable on [ , ]−π π and if an, b

n are

it Fourier coefficients, then prove that

n=

∝

∑1

(an2+b

n2) converges. 5+5

13. Use the method of contour integration to evaluate

(a)dθ

θ

π

5 40

2

+z sin,

(b)x

x xdx

2

2 21 4( ) ( ).

+ +−∝

∝

z 5+5=10

––––––––––

( 5 )

(c) If u is a harmonic function in a region D, prove that

f(z) = ∂∂

∂∂

ux

i uy

− is analytic in D. 2+4+4=10

10. (a) Evaluate z dzCz from z = 0 to z = 4+2i along the curve C

consisting of the line segment from z = 0 to z = 2i followed

by the line segment from z = 2i to z = 4+2i.

(b) Show that 12 22z z+ +z

C

dz = 0, C : |z| = 1. 6+4=10

11. Evaluate :

(a) ez

dzz

2 4+zC

, C : |z–i| = 2.

(b)e

zdz

zt

( ),2 21+z

C

t > 0, C : |z| = 3. 5+5=10

12. Use residue theorem to evaluate

(a)z

z zdz+

+ +z 12 42

C

, C : |z+1+i | = 2.

(b)3 1

1 3

2

2z z

z zdz+ −

− −z ( ) ( ),

C

C : |z| = 2. 5+5=10

( 4 ) ( 3 )

[ Turn over

PART-II

Answer any five questions.

7. (a) Let f(z) = u(x, y)+iv(x, y) be a complex valued function

defined on the region D of the complex plane C. Let u = u(x,

y) and v = v(x, y) be single valued real functions of x any

y, which together with their partial derivatives of the first

order be continuous at every point

(x, y) ( ≡ z = x+iy) ∋D.

If their partial derivatives satisfy CR-equations at (x, y), prove

that f is differentiable at z = x+iy.

(b) Prove that f(z) = z is nowhere differentiable. 8+2=10

8. (a) Find the complex form of CR-equations.

(b) Prove that f (z) = z3 is differentiable at every point and

f '(z) = 3z2.

(c) Find the analytic function f(z) = u+iv, where

u–v = ex (cosy–siny). 3+2+5=10

9. (a) Let f(z) = u+iv is a differentiable function defined on a region

D of the complex plane C. Prove that u, v are harmonic

functions.

(b) Prove that the function

u = 2x–x3+3xy2

is harmonic. Find the harmonic conjugate of u.

Ex/CSE/MATH/T/21A/15/2008(S)

INTER ENGG. COMP. Sc. EXAMINATION, 2008(1st Semester, Supplementary)

MATHEMATICS–V D

Time : Three hours Full Marks : 100

Answer any five questions.

1. a) Find the Fourier series expansion for the function f(x) :

f(x) = x2, – π ≤ x ≤ π

Hence show that

(i) 1 – + – + .... =

(ii) 1 + + + + .... =

b) Find the Fourier series for the function

f(x) = ex, – π ≤ x ≤ π

f(x + 2π) = f(x) , x ∈ R. 12+8

2. Solve the following differential equations : 5×4

(i) + a2y = sec ax

(ii) (x + 10)2 – 4(x + 10) + 6y = x

[ TURN OVER ]

1

22

1

32

1

42

π2

12

π2

6

1

22

1

32

1

42

d2y

dx2

d2y

dx2

dy

dx

7. Evaluate the following real integrals by the method of

contour integration :

(i) IIIII– ∞

∞ , α > 0 , β > 0 , α ≠ β

(ii) IIIII0

2π , 0 < a < 1. 10×2

—————×—————

x2 dx

(x2 + α2 )(x2 + β2 )

dθ

1 – 2acos θ + a2

( 4 )

( 2 ) ( 3 )

(iii) + y = 3x + 5tan x

(iv) x4 + 2x3 – x2 + xy = 1

3. a) Using the method of variation of parameters solve the

following differential equation

+ y = tan x

b) Show that the power series solution of the differential

equation

– a2y = 0 , a2 > 0

Can be put in the form

y = Aeax + Be–ax,

where A and B are constants. 8+12

4. a) Find a power series solution of the differential equation

(x2 – 1) + 3x + xy = 0,

where y(0) = 4 and y /(0) = 6.

b) Show that

IIIII–1

1 Pm(x) Pn(x)dx =

0 , if m ≠ n

, if m = n

5. a) Derive Cauchy-Riemann equations in polar form.

b) If f(z) is analytic within and on a closed contour C and

if a is any point within C then prove that

f(a) = IIIIIC

.

c) Find all harmonic function of the type

u = θ ( x2 + y2 ) that are not constants. 5+10+5

6. Evaluate the following integrals using residue theorem.

(i) IIIIIC

dz where C is | z | = 1

(ii) IIIIIC

dz where C is | z | = 4 10×2

d2y

dx2

d3y

dx2

d2y

dx2

dy

dx

d2y

dx2

d2y

dx2

d2y

dx2

dy

dx

2

2n + 1

1

2πif(z)dz

z – a

z

z4 – 6z2 + 1

4z2 – 4z + 1

(z – 2)(z2 + 4)

[ TURN OVER ]

Ex/CSE/Math/211/12/2007(S)INTER ENGG. (COMPUTER SCIENCE) EXAMINATION , 2007

1st Semester (Supplementary)

MATHEMATICS -VD

Time : Three hours Full marks : 100

PART -I

Answer any three questions.

Two marks reserved for neatness.

1. (a) Find the Fourier series for the function emx.

(b) Find the Fourier series for the following function :

f xx

x x( ) = − − ≤ <

< ≤%&'

π ππ

forfor

00

Hence deduce that

11

3

1

5 82 2

2

+ + + ⋅⋅⋅ = π

8+8

2. (a) Prove that

xnx

nx

n

n

22

123

4= + −1 − < <=

∞

∑π π π1 6cos

,

[ Turn over

( 2 )

(b) Prove that the differential equation

(y cosx + siny + y) dx+(sin x + x cosy + x) dy = 0

is an exact differential equation. Hence solve it.

(c) State Dirichlet’s conditions. 8+4+4

3. (a) Find the general and singular solution of

y px a p b= + +2 2 2 .

(b) If y=u(x) and y = v(x) be two linearly independentsolution of the equation

a xd y

dxa x

dydx

a x y0

2

2 1 2 0( ) ( ) ( ) ,+ + =

Find the general solution of

a xd y

dxa x

dydx

a x y x0

2

2 1 21 6 1 6 1 6 1 6+ + = F .

6+10

4. (a) If y = ex be a solution of the equation

xd y

dxx

dydx

x y2

22 1 1 0− − + − =1 6 1 6 ,

find the general solution of this differential equation.

(b) Use the method of variation of parameters to solve thefollowing equation :

d y

dxa y ax

2

22+ = sec .

8+8

(b) Evaluate z z

z

sec

1-:

C 1 62 3I =dz z, C

(c) Evaluate sin cos

( )where

2C

π πz z

z zdz z

2 2

1 23+

− −=I 1 6

C : .

10. Evaluate any two of the following integrals by the method ofcontour integration :

(i)x dx

x x

2

2 21 4+ +−∞

∞

I 3 83 8

(ii) cos2

cos

θ θθ

πd

r r1 2 20

2

− +I

(iii)ad

aa

θθ

π

2 20

2

0+

>I sin,

(iv)sinx

x xdx2 4 5+ +−∞

∞

I .

_______

( 5 )

(c) If f(z) is an analytic function of z, prove that

∂∂

∂∂

2

2

2

20

x yf z+

=log ( ) .

7. (a) If f(z) is analytic within and on a closed curve and if a is anypoint within C, then prove that

f ai

f z dz

z a( )

( ).=

−I1

2πC

(b) Evaluate the integrals

(i) sinwhere C

2

63 1z

zdz z

−=I π1 6C

:

(ii) e

zdz z

z

2 2 2 4+

=Iπ3 8C

where C: .

8. (a) If f(z) is continuous in a region D and f z dz( ) =I 0C

around

every simple closed curve C in D, then prove that f(z) isanalytic in D.

(b) Find the Laurent’s expression of z

z z2 21 4− +3 83 8 for

(i) |z|< 1; (ii) 1< |z|<2; (iii) |z|>2.

9. (a) If f(z) has a pole of order n at z = a then prove that

Re ( )( )

s f an

d

dzz a f z

n

n

n

z a

=−

−%&'

()*

−

−=

11

1

1!1 6 1 6 .

( 4 ) ( 3 )

5. (a) Prove that the series solution of the equation

d y

dxa y

2

22 0− =

can be put in the form

y= c1eax +c

2e–ax,

where c1 and c

2 are two arbitrary constants.

(b) If Pn denotes the Legendre polynomial of degree n,

prove that

P x P xm n

nm nn m( ) ( )

−I =

≠

+=

%&K

'K1

1 02

2 1

if

if .

8+8

PART -II

Answer any three questions. 16×3

All questions carry equal marks.

Two marks reserved for neatness.

6. (a) Show that the polar form of Cauchy-Riemann equations are

∂ ∂ν∂θ

∂ν ∂∂θ

udr r dr r

u= = −1 1, .

(b) Find the analytic function whose real part is

sincosh cos

22 2

xy x− .

[ Turn over

Ex/CSE/MATH/T/21A/15/2008

INTER ENGG. COMPUTER SCIENCE EXAMINATION, 2008

(1st Semester)

MATHEMATICS–V D

Time : Three Hours Full Marks : 100

(50 marks for each part)

Use a separate Answer-Script for each part.

PART–I

Answer any three questions.

All questions carry equal marks.

Two marks are reserved for neatness.

1. a) State Dirichlet’s conditions for Fourier expansion of a

function f(x) in [ a, b ].

b) Find the Fourier series expansion for the function f(x) if

f(x) = – π , – π < x < 0

= x , 0 < x < π

Hence show that

+ + + .... ∞ =

c) Find a Fourier series for the function

f(t) = (1 – t2) when –1 ≤ t ≤ 1.

[ TURN OVER ]

1

12

1

32

1

52

π2

8

2. Solve the following (any two) :

(i) – a4y = x4

(ii) + 4y = Sin 3x + ex + x2

(iii) + a2y = Sec ax

3. Solve the following (any two) :

(i) (x + a)2 – 4(x + a) + 6y = x.

(ii) + 3 + 2y = e2x Sin x

(iii) x4 + 2x3 – x2 + xy = 1

4. a) Using the method of variation of parameters solve the

following differential equation

+ y = Sin x

b) Find a power series solution of the differential equation

(x2 – 1) + 3x + xy = 0

Where y(0) = 4, y /(0) = 6.

d2y

dx2

d2y

dx2

dy

dx

d3y

dx3

d2y

dx2

dy

dx

dy

dx

d4y

dx4

d2y

dx2

d2y

dx2

d2y

dx2

d2y

dx2

dy

dx

( 2 )

(ii) IIIII–∞∞∞∞∞

∞∞∞∞∞ , α > β > 0

(iii) IIIII0

∞∞∞∞∞ dx, β > 0.

————×————

x Sinx

x2 + β2

x2 dx

(z2–α2)(x2 + β2)

( 5 )

b) Integrate in the counter clockwise sense around

the circle | z | = 2.

8. a) If f(z) is single valued and continuous in a region R and

IIIIIc f(z)dz = 0 for every simple closed curve C in R, then

prove that f(z) is analytic in R.

b) Find the first four terms of Taylor series expansion of the

complex function f(z) = about z= 2. Find also

the region of convergence of the series.

9. Evaluate the following integrals using residue theorem :

(i) IIIIIc

where C is | z | = 3

(ii) IIIIIc

dz where C is | z | = 4.

10. Evaluate any two of the following real integrals by the

method of contour integration :

(i) IIIII0

2π 0 < p < 1

2z3+1

z2 +z

z +1

(z–3)(z– 4)

z dz

(z–1)(z– 2)2

4z 2 – 4z + 1

(z–2)(4 + z2)

dθ

1–2p Sin θ+ p2

( 4 )

5. a) Show that

IIIII–1

+1 Pm(x) Pn(x)dx = 0 , m ≠ n

, m = n

b) Establish the recurrence relation

(2n + 1) Pn(x) = Pn/+1(x) – Pn

/–1(x).

PART–II

Answer any three questions.

All questions carry equal marks.

Two marks are reserved for neatness.

6. a) Find the most general analytic function f(z) = u(x, y) +

iv(x, y) for which v = xy.

b) Prove that

u = x2 – y2 and v = are harmonic functions of

(x, y) but are not harmonic conjugates.

c) Derive Cauchy – Riemann equations in polar form.

7. a) If f(z) is analytic within and on a closed contour C and

if a is any point within C then prove that

IIIIIc = 2πi f(a).

2

2n+1

y

x2+ y2

f(z)dx

z – a

( 3 )

[ TURN OVER ]

EX\CP21E\13\06

INTER ENGG. (C.S.E.) EXAMINATION 2006 1st Semester

MATHEMATICS-V A

Time : Three hours Full Marks : 100

(50 marks for each part)

Use a separate Answer-Script for each part.

PART-I

Answer any three questions.

All questions carry equal marks.

(Two marks for general performance)

1. a) Find the directional derivative of

φ (x, y, z) = x2 – 2y2 + 4z2 at (1, 1, – 1)

in the direction of 2i + 2j + k.

b) Find the unit normal to the surface

xy3z2 = 4 at (–1, – 1, 2)

2. a) Prove that div curl f = 0

b) Prove that ∇ × (φf) = ∇φ ) × f + φ (∇ × f)

3. a) Prove that div (rn r) = (n+3)rn. Hence deduce that rn r is solenoidal iff n = – 3.

[ Turn Over ]

( 2 )

b) Prove that ∇ 2 (rn r) = n(n+3)rn–2r.

4. a) Find the work done by the force

f = (2y+3)i + xzj + (yz–x)k,

when it moves a particle from the point (0, 0, 0) to (2, 1, 1) along the curve x = 2t2. y = t, z = t3.

b) Show that f = (2xy + z3) i + x2j + 3xz2k is a conservative field of force and find the scalar potential φ such that f = ∇ φ.

5. a) Evaluate S∫∫ Curl f . n ds where f = y2i + yj – xzk, and S

is the upper half of the sphere x2 + y2 + z2 = a2 and z ≥ 0.

b) Verify Gauss divergence theorem for the vector function f = (x3–yz)i – 2x2yj + 2k ever the cube bounded by x = 0 , y = 0, z = 0, x = a. y = a. z = a.

PART-II

Answer any three questions.

All questions carry equal marks.

(Two marks for general performance)

6. a) Show that the function f(z) defined by

0z,0

0z,z)z(f(z)2

==

≠=

( 3 )

is not analytic at (0, 0) although C–R equations are satisfied there.

b) Show that zz

4yx 2

2

2

2

2

2

∂∂∂=

∂∂+

∂∂ where z = x + iy

c) Find the harmonic conjugate of the function 4xy+ x + 1 and construct the corresponding analytic function satisfying f(1) = 2 + i. 5+5+6

7. a) Find the value of the integral

∫ ++2i1

0

32 )dzix y – (3x

along the real axis from z = 0 to z = 1 and then, along a line parallel to the imaginary axis from z = 1 to z = 1 + 2i.

b) Let f(z) be analytic in a region R and C is a simple closed contour in R taken in the positive sense. Then prove that

c) Show that

, n = 0, 1, 2 …

5+6+5

8. a) If f(z) is analytic at z0 and has a zero of order m at z0 then show that f(z) can be expressed as

f(z) = (z – zO)m g(z)

where g(zO) ≠ 0 and g(z) is analytic at zO.

[Turn Over]

( 4 )

b) Derive the Laurunt series of the function

in the region (i) 0 < | z | < | and (ii) < | z | < ∝ .

c) The function 3)(zi)(z

16zf(z) 2

2

+−+= has singularities at z = i

and z = – 3. Find the residue at there singularities.

4+6+6

9. a) If f(z) is analytic within a closed curve C excepting at a finite number of poles in it then prove that

C∫ f (z)dz = 2πi × (sum of the residues of f(z) at the poles

within C).

b) Evaluate the complex integral

c) Find the value of the complex integral C∫ z4e1/ zdz where

|z| = 1.

10. Evaluate any two of the following integrals by the method of contour integration.

––––––––x––––––––

Ex/CSE/T/215/18/2010

BACHELOR OF COMPUTER SC. ENGG. EXAMINATION, 2010

(2nd Year, 1st Semester)

OBJECT ORIENTED PROGRAMMING WITH CTT & JAVA

Time : Three hours Full Marks : 100

Attempt any five questions.

1. a) What is VML? 4

b) What are interface, package, component and node? 8

c) Draw the use call diagram for the banking system

described below.

Customer withdraws/ deposit’s money by submitting

necessary information related to the account number

and his details. System verifies the customer and

account. For withdradal, balance of account is also

cheched. Finally the transaction is noted is a registor

and balance at the account is updated. A customer also

can enquire about the balance of his account. Manager

may ask for customer details, account details and may

open or close an account. 8

2. a) What is the significance of component diagram,

deployment diagram and activity diagram? 9

b) What is the difference between a class and a

component? 3[ TURN OVER ]

6. a) Consider a class SCORE with roll and marks as datamembers. Design a RESULT class which writes roll andmarks of all students in RESULT. DAT file. It will providesupport to find (i) the marks for a roll given by user, (ii)the maximum marks and corresponding roll and (iii) toupdate the marks for a roll given by user. Write downC++ code to achieve (i) Operations. (ii) and (iii) inSCORE are also to be shown. 12

b) In C++, when will you use friend function? 2

c) What is the utility of function template in C++? 3

d) What happens when an object is created using classtemplate? 3

7. a) In Java, explain the two ways of creating thread? 6

b) Design the necessary classes in Java, so that , multiplethreads will execute the function process () on samedata. It is to be ensured that only one thread at a timecan run process (). Skeleton code is to be given. 6

c) What is the utility of package and interface in Java? 6

d) What is the difference between protected and default

access specifier in Java? 2

8. Write short notes on the following :

a) Applet in Java. 8

b) Exception Handling. 6

c) Basic type to object conversion and vice versa in C++.6 ————×————

( 4 )

( 2 ) ( 3 )

c) Draw the class diagram for the following system.Examination control department maintains theinformation regarding the subjects, students, paper

setters, examiners and reviewers. For a subject, Papersetter and examiner may be same but reviewer andexaminer are different.One may be paper setter/

examiner /reviewer for various subjects. Questionpaperand marks of the students for the subjects are to bestored.Person-Interface an interface for managing

personal information of persons (students, examiner etc)has also to be considred and relevant classes shouldimplement it. 8

3. a) Consider the statement : X P ; Where , X is a class.

What does it signify in i) c++ and ii) Java? 3

b) What is the utility of static data member? How they are

initialized in C++ and Java? 5

c) How does the role of a destructor in C++ isaccomplished in Java? 4

d) What will you do to achieve runtime polymorphism inC++ and Java? 6

e) In Java, what is the significance of declarig a methodand a class as final? 2

4. a) Design the classes for the following system.

In an institute, various courses are offered. Each coursehas course-id (unique), name. duration and fees.

Number of subjects are taught in a course. Each

subject has subject-id (unique), name. A student takes

admission into a course. student has regd-no (unique),

name and address. Following requirements are to be

met :

i) One must be able to find course details

ii) Subjects covered by a course

iii) Which students belongs to which course

A brief description on how the requirements are

supported by the design is to be provided. 10

b) Consider X is an array of Strings in Java. How can you

find out the number of strings in the array and site of

the ith string. 4

c) In Java, what is the difference between In and Integer?

3

d) Compare macro and inline function in C++. 3

5. a) Consider a class X with public member function void

F(int). Y has been derived from X containery the

additional function void f (void). Consider the Statement

a.f (10). What will happen for the following cases: (i) In

c++, a is an object of Y and (ii) In Java, a is reference

to an Y object. 6

b) Why do we need an abstract class? How will you specify

a class as an abstract class in c++ and Java? 6

c) In C++, why do we need a virtual destructor? 4

d) In C++, why do we need a virtual base class? 4[ TURN OVER ]

Ex/CP 31B/95/2008 (Old)

B. COMP. SC. & ENGG. PART I EXAMINATION, 2008

( 1st Semester, Old )

PROGRAMMING LANGUAGES

Time : Three hours Full Marks : 100

Answer each subpart of Q.1. and any three from the rest.

1. Each of the subparts (i), (ii), (iii), and (iv) carry equal marks :-

i) Fill in the blanks :- 1510

a) Objects are known as of a class.

b) In Java, the size of the char data type is .

c) In Java, un-referenced objects are reclaimed by the

.

d) is an implicit referece to the current object.

e) Generally methods do not perform object-related

tasks.

f) is the term for the feature allowing extension of

a class. In Java, error handling is associated with the

following actions :-

g) You something ;

h) If that something an exception ;

i) You the exception ;

j) And you clean up.

[ Turn over

80

6. Write short notes on any four of the following :- 554

a) Multi-threading in Java.

b) Operators << and >> in C

c) Streams in OOP

d) Polymorphism in OOP

e) Java Virtual Machine

[ 7 ]

ii) Choose the correct option :- 1510

a) Which of the following apply to a static member

variable?

A. It is initialized to zero when the first object of its class

is created.

B. A separate copy of the variable is created for each

object.

C. It retains the value till one object is deleted.

D. It is visible to all the classes in the program.

b) Supposing m to be a declared integer variable, which of

the following are legal declaration of a reference ?

A. int &a = 10 ;

B. int &a = m ;

C. int &a = m++;

D. int &a =sqr(m);

E. Int *a = &16 ;

c) In public derivation accessibility of members of base class

undergo the following modifications in the derived class :

A. private becomes private

B. protected becomes private

C. public becomes protected

D. private is not inherited

[ 2 ] [ 3 ]

d) The following examples show that the class C is derived

from classes A and B. Which of them is legal ?

A. class C : public A : public B

B. class C : public A, B

C. class C : private A, public B

D. class C :: public A, public B

e) The major goal of inheritance in C++ is

A. To facilitate the conversion of data types

B. To help modular programming

C. To facilitate the reusability of code

D. To hide the details of base classes

e) The major goal of inheritance in C++ is

A. To facilitate the conversion of data types

B. To help modular programming

C. To facilitate the reusability of code

D. To hide the details of base classes

f) Which of the following is overloading the function

int sum (int x, int y)

A. int sum (int p, int q)

B. float sum (int x, int y)

[ Turn over

C. int sum (float x, float y)

D. char sum (int a, int b)

g) The function show ( ) is a member of the class A and adj is

a object of A and ptr is a pointer to A.

Which of the following is a valid access statements ?

A. ptr->show(); B. abj->show();

C. ptr.show(); D. (*ptr).show();

h) The friend functions is used in situations where

A. We want to exchange data between classes

B. We want to have access to abstract classes

C. Dynamic binding is required

D. We want to create versatile overloaded operators

i) Which of the following is legal when x is a data member of

a class ?

A. this->x B. this.x

C. *this.x D. *(this.x)

j) Which of the following can have access to the protected

members of a class ?

A. A member function of any class in the program

B. A member function of a class that is a friend of the class

C. A function in the program that is declared as static

iii) State True or False :- 1510

a) Struct keyword in C++ refers to a class.

b) The qualifier inline is used to refer to member

functions.

c) Nested classes are allowed in Java.

d) Member functions of a class can call each other directly.

e) The final modifier is used with an error in Java.

f) Data members in a class must be declared private.

g) The precedence of an operator can be changed by

overloading it.

h) A function declared static cant access non-static class

members.

i) An abstract class is never used as a base class.

j) Template classes can work with different data types.

iv) Correct the syntax :- 452.5

a) void divide (int m, int n)

cout << m/n;

[ 4 ] [ 5 ]

[ Turn over

b) int main( )

cout << test ( );

return 0;

float test( )

// function code

c) int main(char *argv[ ])

count << “Program name is “ << argv[0];

d) class B ;

class D1 : public B ;

class D2 : public B ;

class DD : public D1, public D2 ;

2. a) Write program code to generate a Fraction class with the

following provisions : 10

i) two data items giving numerator and denominator

ii) at least two overloaded constructors

iii) a function to set the numerator and denominator via

array

iv) a function to get the numerator and denominator via

array

b) Write a recursive function in C to display the binary

equivalent of a decimal integer. 10

3. a) Write the outline of a simple program to generate 3 derived

classes Manager, Programmer and DE_Operator from a

base class Employee and display proper messages for

creation of objects of each class – suppose at the time of

recruitment. 10

b) Implement a complex class and overload the operator + for

it using a friend function. 10

4. a) What are Template Classes and Function ? Write program

parts to illustrate your answer. 852

b) Discuss the concept of Containership. 4

5. Explain with examples :

a) In C how are command line arguments handled ? 5

b) In OOP, how are errors handled ? 6

c) Purpose served by the keywords public, protected andprivate. 9

[ 6 ] [ 7 ]

[ Turn over

B. C. S. E. Part I Examination, 2006 (1st Semester)

PROGRAMMING LANGUAGE

Time: Three hours Full Marks: 100

Group A is compulsory. Answer any three from Group B. All sub-parts of a question must be answered together at the same place in your answer-

script.

Group A Answer all questions.

1. (a) Fill in the blanks in each of the following: 2X10 = 20

i) The key protocol that forms the basis of the World Wide Web is____________. ii) Many of Java’s networking classes are contained in package________________. iii) A(n)____________is a group of related records. iv) The smallest data item a computer can process is called a(n)_____________. v) List three layout managers commonly used in Java __________, _____________, and

vi) Write a single statement that compares the string in s1 to the string in s2 for equality of contents.__________________________________.

vii) Casting a superclass object to a subclass object is called______________. viii) ______________involves using a superclass variable to invoke methods on superclass

and subclass objects. ix) In a(n)__________________relationship, an object of a subclass also can be treated as

an object of its superclass. x) Subclass constructors can call superclass constructors via the___________keyword.

(b) Determine whether each of the following is true ox false. If false, explain why. 1X7=7

i) Inheritance encourages the reuse of proven high-quality software, ii) When a subclass redefines a superclass method by using the same signature, the subclass iii) is said to overload that superclass method, iv) An array index should normally be of type float. v) A “has-a” relationship is implemented via inheritance. vi) If a superclass declares an abstract method, a subclass must implement that method vii) to become a concrete class. viii) Inner classes are not allowed to access the members of the enclosing class, ix) Method getSize returns the size of the current font in centimetres.

2. Create a class IntegerSet. Each IntegerSet object can hold integers in the range 0- 100. The set is represented by an array of booleans. Array element a [ i ] is true if integer i is in the set. Array element a[ j] is false if integery is not in the set. The no- argument constructor initialises the Java array to the “empty set” i.e., a set whose array representation contains all false values.

[ Turn over

( 2 )

Provide the following methods: Method union creates a third set that is the set-theoretic union of two existing sets (i.e., an element of the third set’s array is set to true if that element is true in either or both of the existing sets; otherwise, the element of the third set is set to false). Method intersection creates a third set which is the set-theoretic intersection of two existing sets. Method insertElement inserts a new integer k into a set by setting a[k] to true. Method deleteElement deletes integer m by setting a[m] to false. Method toSetString returns a string containing a set as a list of numbers separated by spaces. Include only those elements that are present in the set. Use --- to represent an empty set. Method isEqualTo determines whether two sets are equal.

Write a program to test class IntegerSet.

25

Group B Answer any three.

3. Define a method hypotenuse that calculates the length of the hypotenuse of a right triangle when the lengths of the other two sides are given. The method should take two arguments of type double and return the hypotenuse as a double. Incorporate this method into an applet that reads values for sidel and side2 from JTextField objects and performs the calculation with the hypotenuse method. The user should interact with the program by typing numbers in both JTextFields, but pressing Enter only in the second JTextField.

16

4. Write a program that plays “guess the number” as follows: Your program chooses the number to be guessed by selecting an integer at random in the range 1-1000. The program then displays the following in a label:

I have a number between 1 and 1000. Can you guess my number? Please enter your first guess.

A JTextField should be used to input the guess. As each guess is input, the background colour should change to either red or blue. Red indicates that the user is getting “warmer” and blue indicates that the user is getting “colder”. A JLabel should display either “Too High” or “Too Low” to help the user zero in on the correct answer. When the user gets the correct answer, “Correct!” should be displayed and the JTextField used for input should be changed to be uneditable. A JButton should be provided to allow the user to play the game again. When the JButton is clicked, a new random number should be generated and the input JTextField changed to be editable.

16

5. Write a program that bounces a blue ball inside an applet. The ball should begin moving with a mousePressed event. When the ball hits the edge of the applet, the ball should bounce off the edge and continue in the opposite direction.

Extend the program to add a new ball each time the user clicks the mouse. Provide for a minimum of 20 balls and randomly choose the colour for each new ball.

16

( 3 )

6. Find the error in each of the following program segments. Explain how to correct the error. 16

a) int g ( ) System.out.println (“Inside method g”); int h ( )

System.out.println (nInside method h”);

b) int sum (int x, int y) int result; result = x + y;

c) int sum (int n) if (n == 0)

return 0; else

n + sum (n - 1);

d) void f (float a) ; float a; System.out.println ( a ) ;

e) void product () int a = 6, b = 5, c = 4, result; result = a * b * c; System.out.println (“Result is “ + result); return result;

7. Describe the five steps required to establish and complete a Client-Server communication. What supports are available in Java to develop a Client-Server system? How do they relieve the programmer of the drudgery of complicated and lengthy program writing? What is meant by a “stateless” server?

16