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    VLSI Technology

    by

    SANKHA CHAKRAPAREEK

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    Introduction (Lecture 1)

    History of VLSI

    MOS Transistor - Introduction

    Transistor scaling and Moores law - BKD

    VLSI Technology

    MOS Technology (Lecture 2 & 3) MOS Transistor Characteristics and Short Channel Effects

    Fabrication of CMOS structure

    VLSI Design (Lecture 4 & 5)

    Complexities involved and key design issues

    VLSI Design flow (analog, digital, RF, CPLD, FPGA)

    Role of design engineer in IC industry

    Manufacturing trends & ITRS Roadmap

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    Introduction to VLSI

    (Lecture 1)

    Sources:

    International TechnologyRoadmap For Semiconductors -http://public.itrs.net/

    INTEL-

    http://www.intel.com/technology/silicon/index.htm

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    High

    Low

    FailureR

    ate

    Cost

    1 mm

    1-5 nm High

    Low

    Minimum

    FeatureSize

    Complex

    ity

    1930-

    1950s

    1960s

    1970-90

    VACUUM TUBES

    SEMICONDUCTOR BASEDTRANSISTORS

    PLANAR TRANSISTORS

    ICs LSI, VLSI

    SMART STRUCTURES (MEMS)1995-

    NANO STRUCTURES

    2010-

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    First Computer

    The BabbageDifference Engine

    (1832)

    25,000 parts

    cost: 17,470

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    ENIAC - The First Electronic Computer

    (1946)

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    First TransistorPoint Contact Germanium Transistor

    Shockley, Brattain & Bardeen - Bell Labs, 1948

    Nobel Prize - 1956

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    Planar Process

    p-n Junction Formation

    p-Si

    oxidise Lithography Etch P-Diffuse

    n-SiMask

    Light

    n+

    p-Si

    ox

    p+

    p n+

    n n

    n+

    b e c

    Bipolar transistor

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    First Integrated Circuits

    First IC Jack Kilby, 1958, Texas

    Instruments, Nobel Prize 2000

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    Early Integrated Circuits

    Bipolar logic

    1960s

    ECL 3-input Gate

    Motorola 1966

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    Intel 4004 Micro-Processor

    1971

    1000 transistors

    1 MHz operation

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    IC Processor

    INTEL Pentium IV IBM Corp. Power PC

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    INTEL Montecito 90nm1.72 billion transistors

    INTEL Prescot 90nm125 million transistors

    IC Processor

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    0.57 m2 cell size

    >0.5 billion transistors

    110 mm2 chip size

    Fully functional 70 Mbit

    SRAM chips have been

    fabricated.

    IC SRAM Chip

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    Transistor Shockley, Brattain &Bardeen (Bell

    Labs) in 1948 NL 1956

    Bipolar transistor Schockley in 1949First bipolar digital logic gate Harris in 1956

    First monolithic IC Jack Kilby in 1958 NL 2000

    First commercial IC logic gates Fairchild 1960

    TTL1962 into the 1990s

    ECL1974 into the 1980s

    Evolution of

    Integrated Circuits

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    Transistor Bardeen et al.(Bell Labs) in 1947

    MOSFET transistor - Lilienfeld (Canada) in 1925

    and Heil (England) in 1935

    CMOS1960s, but plagued with manufacturingproblems

    PMOS in 1960s (calculators)

    NMOS in 1970s (4004, 8080) for speed

    CMOS in 1980s preferred MOSFET technology

    because of power benefits

    BiCMOS, Gallium-Arsenide, Silicon-Germanium

    SOI, Copper-Low K,

    Evolution of Integrated

    Circuits

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    Integrated Circuits

    SSI Small Scale Integrated CircuitsLess than 10 gates e.g., 7404 inverter

    MSI Medium Scale Integrated Circuits

    Less than 1000 gates e.g., 74161 counter

    LSI Large Scale Integrated CircuitsLess than 10,000 gates e.g., 8bit -

    processor

    VLSI Very Large Scale Integrated Circuitsmore than 10,000 gates e.g., 64bit -

    processor

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    MOS Structure

    metal orn+- polysilicon

    p-silicon

    +

    +

    +

    +

    +

    +

    +

    +

    +

    oxide

    Gate charge

    Depletion layer charge

    or Bulk charge

    In a metal-oxide-silicon structure, a depletion layer

    forms below the metal gate. For p-type silicon

    substrate, a positive charge develops on metal side

    and depletion layer is negatively charged.

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    MOS Structure

    M O p-Si

    ++++

    Accumulation,VGB VT

    ++++

    +

    +++

    ++++

    Depletion0 < VGB < VT

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    MOS Transistor

    p- Si

    n+ poly-Si

    n+ n+

    depletion

    region

    VG

    VD

    Wdep n-channel

    Gate

    Drain

    Source

    VS

    L channel length

    oxide

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    NMOS transistor (NMOSFET) behaves as a resistor when VDS is low: Drain current I

    Dincreases linearly with V

    DS

    Resistance RDS

    between SOURCE & DRAIN depends on VGS

    RDS

    is lowered as VGS

    increases above VT

    NMOS Transistor

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    VDS= VGSVT Inversion-layer is pinched-offat the drain end

    VGS

    > VT

    : Pinch-off

    Electrons are swept into the drain by the E-field when theyenter the pinch-off region and saturation occurs.

    NMOS Transistor

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    MOS Transistor

    Cut-off :

    Linear region :

    Saturation :

    Back gate effect :

    DST

    DS

    GSoxnD V)V2

    V

    V(CL

    W

    I

    0ID

    2

    TGSoxnD )VV(CL2

    WI

    )2V2()0V(V)V(V pBSpBSGS

    TBS

    GS

    T

    0

    1

    2

    3

    4

    5

    6

    0 0.5 1 1.5 2 2.5

    VDS (V)

    X 10-4

    VGS = 1.0V

    VGS = 1.5V

    VGS = 2.0V

    VGS = 2.5V

    Linear Saturation

    VDS = VGS - VT

    cut-

    off

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    Without a gate voltage applied, no current can flow

    between the source and drain regions.

    Above a certain gate-to-source voltage (thresholdvol tageVT), a conducting layer of mobile electrons isformed at the Si surface beneath the oxide. These

    electrons can carry current between the source and drain.

    G

    NMOS Transistor

    n

    p

    oxide insulatorgate

    n

    D

    S

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    MOSFET as a Resistive Switch

    For digital circuit applications, the MOSFET is eitherOFF (VGS< VT) or ON (VGS= VDD). Thus, we only need

    to consider two IDvs. VDScurves:

    1. the curve forVGS< VT

    2. the curve forVGS= VDD

    ID

    VDS

    VGS= VDD (closed switch)

    VGS< VT (open switch)

    Req

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    For current to flow, VGS > VT

    Enhancement mode: VT > 0 Depletion mode: VT < 0

    Transistor is ON when VG=0V

    For current to flow, VGS < VT

    Enhancement mode: VT

    < 0

    Depletion mode: VT > 0

    Transistor is ON when VG=0V

    NMOS & PMOS Transistor

    p-type Si

    n+ poly-Si

    NMOS

    n+ n+

    n-type Si

    p+ poly-Si

    PMOS

    p+ p++ + + + +

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    As compared to an n-channel MOSFET, the signs of all the voltages

    and the currents are reversed:

    PMOS Transistor

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    W

    L

    MOS

    TransistorStructure

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    Source

    DrainGate (contact not shown)

    MOS Structure

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    Transistor

    for 90nm

    process

    InProduction

    MOS Structure

    After Intel Corp

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    After Intel Corp

    After Intel Corp

    Transistor Scaling

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    Generation:

    Intel386 DXProcessor

    Intel486 DX

    Processor

    PentiumProcessor

    Pentium IIProcessor

    1.5 1.0 0.8 0.6 0.35 0.25

    Benefit of Transistor Scaling

    smaller chip area lower cost

    more functionality on a chip better system performance

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    Moores Law

    In 1965, Gordon Moore predicted that thenumber of transistors that can be integrated on

    a die would double every 18 to 14 months (i.e.,

    grow exponentially with time).

    Amazingly visionary million transistor/chip

    barrier was crossed in the 1980s.

    2300 transistors, 1 MHz clock (Intel 4004) - 1971

    16 Million transistors (Ultra Sparc III)

    42 Million, 2 GHz clock (Intel P4) - 2001

    140 Million transistor (HP PA-8500)

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    40048008

    80808085 8086

    286386

    486Pentium procP6

    0.001

    0.01

    0.1

    1

    10

    100

    1000

    1970 1980 1990 2000 2010

    Year

    Transistors(M

    T)

    2X growth in 1.96 years!

    Transistors on lead microprocessors double every 2 years

    Courtesy, Intel

    Moores Law

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    Moores Law

    90 nm Montecito processor breaks through billion transistor

    mark ahead of trend line with 1.72B transistors

    After Intel Corp

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    64

    256

    1,000

    4,000

    16,000

    64,000

    256,000

    1,000,000

    4,000,000

    16,000,000

    64,000,000

    10

    100

    1000

    10000

    100000

    1000000

    10000000

    100000000

    1980 1983 1986 1989 1992 1995 1998 2001 2004 2007 2010

    Year

    K

    bitcapacity/

    chip

    1.6-2.4 m

    1.0-1.2 m

    0.7-0.8 m

    0.5-0.6 m

    0.35-0.4 m

    0.18-0.25 m

    0.13 m

    0.1 m

    0.07 m

    encyclopedia2 hrs CD audio30 sec HDTV

    book

    page

    4X growth every 3 years!

    DRAM Chip

    human memoryhuman DNA

    Moores Law

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    Moores Law

    Processor power will keep doubling every two years.

    After Intel Corp

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    Moores Law

    Transistor physical gate length will reach ~15 nm beforeend of this decade, and ~10 nm early next decade.

    After Intel Corp

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    After Intel Corp

    Moores Law

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    Moores Law

    After Intel Corp

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    40048008

    80808085

    8086286

    386486Pentium proc

    P6

    1

    10

    100

    1970 1980 1990 2000 2010

    Year

    Diesize(mm)

    ~7% growth per year

    ~2X growth in 10 years

    Die size grows by 14% to satisfy Moores Law

    Courtesy, Intel

    Moores Law

    Die Size

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    Lead microprocessors frequency doubles every 2 years

    P6Pentium proc

    486386

    28680868085

    8080

    80084004

    0.1

    1

    10

    100

    1000

    10000

    1970 1980 1990 2000 2010

    Year

    Frequency(Mhz)

    2X every 2 years

    Courtesy, Intel

    Moores Law

    Clock Frequency

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    Lead Microprocessors power continues to increase

    P6Pentium proc

    486

    3862868086

    80858080

    80084004

    0.1

    1

    10

    100

    1971 1974 1978 1985 1992 2000Year

    Power(Watts)

    Courtesy, Intel

    Power delivery and dissipation will be prohibitive

    Moores Law

    Power Dissipation

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    40048008

    8080

    8085

    8086

    286386

    486

    Pentium procP6

    1

    10

    100

    1000

    10000

    1970 1980 1990 2000 2010

    Year

    PowerDensity(W/cm2)

    Hot Plate

    Nuclear

    Reactor

    Rocket

    Nozzle

    Power density too high to keep junctions at low temp

    Courtesy, Intel

    Moores Law

    Power Density

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    1.E-07

    1.E-05

    1.E-03

    1.E-01

    1.E+01

    68 72 76 80 84 88 92 96 00 04

    Year

    CostUS$/t

    ransistor

    Moores Law

    Moores Law meansDecreasing Costs:Packing more transistors into

    less space has dramatically

    reduced their cost and the cost

    of the products they populate.

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    Lithography

    Node (nm)

    250 180 130 90 65 45

    Process P856 P858 Px60 P1262 P1264 P1266

    Ist Year ofProduction

    1997 1999 2001 2003 2005 2007

    Gate Length

    (nm)

    200 130

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    Transistor

    for 90nm

    process

    InProduction

    Moores Law

    After Intel Corp

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    Moores Law

    15nm Research Transistor

    After Intel Corp

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    Moores Law130 nm node

    70 nm length

    Production-2001

    90 nm node

    50 nm length

    Production-2003

    65 nm node

    30 nm length

    Production-2005

    45 nm node

    20 nm lengthProduction-2007

    32 nm node

    15nm length

    Production-2009

    After Intel Corp

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    Moores Law - Future

    Future High-k Dielectricfor Reduced Gate Leakage

    30nm Tri-gate Transistor

    After Intel Corp

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    Silicon Nanowires

    Source: Morales & Lieber,Science 279, 280 (1998)

    Moores Law - Future

    After Intel Corp

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    Moores Law - Future

    Intel SiliconOptical ModulatorConvergence of

    silicon and optical

    communications

    MEMS-basedRF Switches

    After Intel Corp

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    Processed Silicon Wafer in 2000

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    Why Scaling? Technology shrinks by ~0.7 per generation

    With every generation can integrate 2x more functions ona chip; chip cost does not increase significantly

    Cost of a function decreases by 2x

    But How to design chips with more and more functions?

    Design engineering population does not double every two

    years Hence, a need for more efficient design methods

    Exploit different levels of abstraction

    Moores Law & IC Design

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    Design Levels

    n+n+

    S

    GD

    +

    DEVICE

    CIRCUIT

    GATE

    MODULE

    SYSTEM

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    Investment into IC Manufacture

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    IC Manufacture Trend

    Source ITRS